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authorHans Verkuil <hverkuil-cisco@xs4all.nl>2020-02-27 15:39:14 +0100
committerHans Verkuil <hverkuil-cisco@xs4all.nl>2020-02-27 15:39:14 +0100
commit0219ae832f8559868f5e5ffbea9b207e10fab2d8 (patch)
tree50aed77210911f6e68e81921da19bcfe6b488860 /parse-base-block.cpp
parent70c168e4b3dc16f7637d3610715614206ff92b49 (diff)
edid-decode: correctly report YCbCr 4:2:0 timings
These formats transmit two lines as if it was one line. So the pixelclock is actually running at half the speed, and the same is true for the horizontal frequency. This incorrect reporting caused incorrect display range checks as well. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Diffstat (limited to 'parse-base-block.cpp')
-rw-r--r--parse-base-block.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/parse-base-block.cpp b/parse-base-block.cpp
index f842264..bd5ad37 100644
--- a/parse-base-block.cpp
+++ b/parse-base-block.cpp
@@ -982,6 +982,19 @@ void edid_state::detailed_display_range_limits(const unsigned char *x)
range_class.c_str(),
x[5] + v_min_offset, x[6] + v_max_offset,
x[7] + h_min_offset, x[8] + h_max_offset);
+
+ // For EDID 1.3 the horizontal frequency maxes out at 255 kHz.
+ // So to avoid false range-check warnings due to this limitation,
+ // just double the max_display_hor_freq_hz in this case.
+ if (edid_minor < 4 && x[8] == 0xff)
+ max_display_hor_freq_hz *= 2;
+
+ // For EDID 1.3 the vertical frequency maxes out at 255 Hz.
+ // So to avoid false range-check warnings due to this limitation,
+ // just double the max_display_vert_freq_hz in this case.
+ if (edid_minor < 4 && x[6] == 0xff)
+ max_display_vert_freq_hz *= 2;
+
if (x[9]) {
max_display_pixclk_khz = x[9] * 10000;
printf(", max dotclock %d MHz\n", x[9] * 10);

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