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authorBjorn Helgaas <bhelgaas@google.com>2017-09-07 13:24:19 -0500
committerBjorn Helgaas <bhelgaas@google.com>2017-09-07 13:24:19 -0500
commit9198407e23ec89f0e1562f439771aeea83345d0d (patch)
treec6a53b71b48c49d7713539eb035e7b2fcec69d2a /arch/tile
parentd872694bac212f76ca13fd20a85e5c1bdb53a945 (diff)
parentc775697b713b70293507573355aa8c8c177db35b (diff)
Merge branch 'pci/resource' into next
* pci/resource: microblaze/PCI: Remove pcibios_setup_bus_{self/devices} dead code ARC: Remove empty kernel/pcibios.c PCI: Add a generic weak pcibios_align_resource() PCI: Add a generic weak pcibios_fixup_bus()
Diffstat (limited to 'arch/tile')
-rw-r--r--arch/tile/kernel/pci.c18
-rw-r--r--arch/tile/kernel/pci_gx.c14
2 files changed, 0 insertions, 32 deletions
diff --git a/arch/tile/kernel/pci.c b/arch/tile/kernel/pci.c
index 884826157765..bbf81579b1f8 100644
--- a/arch/tile/kernel/pci.c
+++ b/arch/tile/kernel/pci.c
@@ -67,16 +67,6 @@ static struct pci_ops tile_cfg_ops;
/*
- * We don't need to worry about the alignment of resources.
- */
-resource_size_t pcibios_align_resource(void *data, const struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- return res->start;
-}
-EXPORT_SYMBOL(pcibios_align_resource);
-
-/*
* Open a FD to the hypervisor PCI device.
*
* controller_id is the controller number, config type is 0 or 1 for
@@ -380,14 +370,6 @@ int __init pcibios_init(void)
}
subsys_initcall(pcibios_init);
-/*
- * No bus fixups needed.
- */
-void pcibios_fixup_bus(struct pci_bus *bus)
-{
- /* Nothing needs to be done. */
-}
-
void pcibios_set_master(struct pci_dev *dev)
{
/* No special bus mastering setup handling. */
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index e68317083ac7..9aa238ac7b35 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -108,15 +108,6 @@ static struct pci_ops tile_cfg_ops;
/* Mask of CPUs that should receive PCIe interrupts. */
static struct cpumask intr_cpus_map;
-/* We don't need to worry about the alignment of resources. */
-resource_size_t pcibios_align_resource(void *data, const struct resource *res,
- resource_size_t size,
- resource_size_t align)
-{
- return res->start;
-}
-EXPORT_SYMBOL(pcibios_align_resource);
-
/*
* Pick a CPU to receive and handle the PCIe interrupts, based on the IRQ #.
* For now, we simply send interrupts to non-dataplane CPUs.
@@ -1049,11 +1040,6 @@ alloc_mem_map_failed:
}
subsys_initcall(pcibios_init);
-/* No bus fixups needed. */
-void pcibios_fixup_bus(struct pci_bus *bus)
-{
-}
-
/* Process any "pci=" kernel boot arguments. */
char *__init pcibios_setup(char *str)
{

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