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authorTony Lindgren <tony@atomide.com>2017-12-15 09:41:14 -0800
committerTony Lindgren <tony@atomide.com>2017-12-21 07:28:54 -0800
commita7199e2b91ded41adbb6fd384a85e358d25f48c8 (patch)
tree395e5de4d545a5995e16462c9b7378ac6c658216 /drivers/bus
parent70a65240efb1116f4f580c2f8235ba58000889b0 (diff)
bus: ti-sysc: Detect i2c interconnect target module based on register layout
We can easily detect i2c based on it's non-standard module registers that consist of two 32-bit registers accessed in 16-bit mode. So far we don't have other 16-bit modules, so there's currently no need to add a custom property for 16-bit register access. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/bus')
-rw-r--r--drivers/bus/ti-sysc.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c
index 0c9b9bcd75b2..4c1e59e53a0c 100644
--- a/drivers/bus/ti-sysc.c
+++ b/drivers/bus/ti-sysc.c
@@ -213,6 +213,21 @@ static int sysc_check_children(struct sysc *ddata)
return 0;
}
+/*
+ * So far only I2C uses 16-bit read access with clockactivity with revision
+ * in two registers with stride of 4. We can detect this based on the rev
+ * register size to configure things far enough to be able to properly read
+ * the revision register.
+ */
+static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
+{
+ if (resource_size(res) == 8) {
+ dev_dbg(ddata->dev,
+ "enabling 16-bit and clockactivity quirks\n");
+ ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
+ }
+}
+
/**
* sysc_parse_one - parses the interconnect target module registers
* @ddata: device driver data
@@ -243,6 +258,8 @@ static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
}
ddata->offsets[reg] = res->start - ddata->module_pa;
+ if (reg == SYSC_REVISION)
+ sysc_check_quirk_16bit(ddata, res);
return 0;
}

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