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authorStephen Boyd <sboyd@codeaurora.org>2018-01-26 16:41:47 -0800
committerStephen Boyd <sboyd@codeaurora.org>2018-01-26 16:41:47 -0800
commit21170e3bda0e425d7301f27e6bee7e84cfbfa519 (patch)
treee464c77f13758e9a59461a9160bb6d4fc602baca /drivers/clk
parent74b48999b1c80f42ad0477341aac7249d2641b04 (diff)
parenta6ae1a2948d4bccf49ff64a3f907514ce7d81bac (diff)
parent2089dc33ea0e3917465929d4020fbff3d6dbf7f4 (diff)
parent36ab04671570fcd0e33868eba83f361d76c36bbf (diff)
parent59dc3d8c867370b4860c9df3eb5483da46823a4b (diff)
parent7f41bd4a31e0e42f5353517c1c15d8d3152c1487 (diff)
Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and 'clk-qcom-ipq8074' into clk-next
* clk-spreadtrum: clk: sprd: add clocks support for SC9860 clk: sprd: Add dt-bindings include file for SC9860 dt-bindings: Add Spreadtrum clock binding documentation clk: sprd: add adjustable pll support clk: sprd: add composite clock support clk: sprd: add divider clock support clk: sprd: add mux clock support clk: sprd: add gate clock support clk: sprd: Add common infrastructure clk: move clock common macros out from vendor directories * clk-mvebu-dvfs: clk: mvebu: armada-37xx-periph: add DVFS support for cpu clocks clk: mvebu: armada-37xx-periph: prepare cpu clk to be used with DVFS clk: mvebu: armada-37xx-periph: cosmetic changes * clk-qoriq: clk: qoriq: add more divider clocks support * clk-imx: clk: imx51: uart4, uart5 gates only exist on imx50, imx53 * clk-qcom-ipq8074: clk: qcom: ipq8074: add misc resets for PCIE and NSS dt-bindings: clock: qcom: add misc resets for PCIE and NSS clk: qcom: ipq8074: add GP and Crypto clocks clk: qcom: ipq8074: add NSS ethernet port clocks clk: qcom: ipq8074: add NSS clocks clk: qcom: ipq8074: add PCIE, USB and SDCC clocks clk: qcom: ipq8074: add remaining PLL’s dt-bindings: clock: qcom: add remaining clocks for IPQ8074 clk: qcom: ipq8074: fix missing GPLL0 divider width clk: qcom: add parent map for regmap mux clk: qcom: add read-only divider operations

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