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authorStephen Boyd <sboyd@codeaurora.org>2018-01-26 16:41:52 -0800
committerStephen Boyd <sboyd@codeaurora.org>2018-01-26 16:41:52 -0800
commita2c09c12d4e1935807d02d58d2a338fa74554305 (patch)
tree0cdf9aa8681a9dc11d03c1285f6e9c73910b330a /drivers/clk
parent21170e3bda0e425d7301f27e6bee7e84cfbfa519 (diff)
parent13967bea0bdb194b8674b4102fcdd383a8a18baa (diff)
parentf8f8f1d04494d3a6546bee3f0618c4dba31d7b72 (diff)
parent448c3c057a1dbb6ecf6e507a3f1a58f5eab21560 (diff)
parent0136f852be24fd9de35f0d0c1a1d2b2dcb5eb612 (diff)
parent869de5cf96cf3952e8f998581cd368e38cebf8d2 (diff)
Merge branches 'clk-at91', 'clk-imx7ulp', 'clk-axigen', 'clk-si5351' and 'clk-pxa' into clk-next
* clk-at91: clk: at91: pmc: Support backup for programmable clocks clk: at91: pmc: Save SCSR during suspend clk: at91: pmc: Wait for clocks when resuming * clk-imx7ulp: clk: Don't touch hardware when reparenting during registration * clk-axigen: clk: axi-clkgen: Round closest in round_rate() and recalc_rate() clk: axi-clkgen: Correctly handle nocount bit in recalc_rate() * clk-si5351: clk: si5351: _si5351_clkout_reset_pll() can be static clk: si5351: Do not enable parent clocks on probe clk: si5351: Rename internal plls to avoid name collisions clk: si5351: Apply PLL soft reset before enabling the outputs clk: si5351: Add DT property to enable PLL reset clk: si5351: implement remove handler * clk-pxa: clk: pxa: unbreak lookup of CLK_POUT

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