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authorSteve Longerbeam <slongerbeam@gmail.com>2014-06-25 18:05:40 -0700
committerPhilipp Zabel <p.zabel@pengutronix.de>2014-09-02 14:55:48 +0200
commitaa52f57894b93dcfdd615b35a7579e161f1e7a38 (patch)
tree1aa38dc7ff5ed6250c2c69291826664c1563e5f5 /drivers/gpu/ipu-v3/ipu-prv.h
parenta4cd8f229ff71db0c95c0d96381d4fb9239fdb19 (diff)
gpu: ipu-v3: Add ipu_idmac_buffer_is_ready()
Add ipu_idmac_buffer_is_ready(), returns true if the given buffer in the given channel is set ready (owned by IPU), or false if not ready (owned by CPU core). Support has been added for third buffer, there is no support yet for triple-buffering in idmac channels, but this function checks buffer-ready for third buffer in case this support is added later. Signed-off-by: Steve Longerbeam <steve_longerbeam@mentor.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Diffstat (limited to 'drivers/gpu/ipu-v3/ipu-prv.h')
-rw-r--r--drivers/gpu/ipu-v3/ipu-prv.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/ipu-v3/ipu-prv.h b/drivers/gpu/ipu-v3/ipu-prv.h
index 7f08a461c929..bfb1e8a4483f 100644
--- a/drivers/gpu/ipu-v3/ipu-prv.h
+++ b/drivers/gpu/ipu-v3/ipu-prv.h
@@ -68,6 +68,7 @@ struct ipu_soc;
#define IPU_DISP_TASK_STAT IPU_CM_REG(0x0254)
#define IPU_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0268 + 4 * ((ch) / 32))
#define IPU_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0270 + 4 * ((ch) / 32))
+#define IPU_CHA_BUF2_RDY(ch) IPU_CM_REG(0x0288 + 4 * ((ch) / 32))
#define IPU_ALT_CHA_BUF0_RDY(ch) IPU_CM_REG(0x0278 + 4 * ((ch) / 32))
#define IPU_ALT_CHA_BUF1_RDY(ch) IPU_CM_REG(0x0280 + 4 * ((ch) / 32))

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