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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2017-11-06 18:34:37 +0000
committerMarc Zyngier <marc.zyngier@arm.com>2017-11-07 11:17:42 +0000
commit706cffc1b912342668e621526c860fb093dfc2d5 (patch)
tree08b0574dc9cb60f18b69ee53f9c179867952605a /drivers/irqchip/Kconfig
parent0ea04c7322b0dbbc4e7a862451855b10ef9922d3 (diff)
irqchip/exiu: Add support for Socionext Synquacer EXIU controller
The Socionext Synquacer SoC has an external interrupt unit (EXIU) that forwards a block of 32 configurable input lines to 32 adjacent level-high type GICv3 SPIs. The EXIU has per-interrupt level/edge and polarity controls, and mask bits that keep the outgoing lines de-asserted, even though the controller may still latch interrupt conditions that occur while the line is masked. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/Kconfig')
0 files changed, 0 insertions, 0 deletions

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