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authorLinus Torvalds <torvalds@linux-foundation.org>2015-09-05 18:21:14 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2015-09-05 18:21:14 -0700
commit9cfcc658da9693f65e7224e8329e40ada2f3c699 (patch)
tree44fb518eee069733f3f895177899815e7c89e5b0 /drivers/media/dvb-frontends
parente3a98ac47698bf1c1e4e6fae72afc9866953fce5 (diff)
parent50ef28a6ac216fd8b796257a3768fef8f57b917d (diff)
Merge tag 'media/v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab: - new DVB frontend drivers: ascot2e, cxd2841er, horus3a, lnbh25 - new HDMI capture driver: tc358743 - new driver for NetUP DVB new boards (netup_unidvb) - IR support for DVBSky cards (smipcie-ir) - Coda driver has gain macroblock tiling support - Renesas R-Car gains JPEG codec driver - new DVB platform driver for STi boards: c8sectpfe - added documentation for the media core kABI to device-drivers DocBook - lots of driver fixups, cleanups and improvements * tag 'media/v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (297 commits) [media] c8sectpfe: Remove select on undefined LIBELF_32 [media] i2c: fix platform_no_drv_owner.cocci warnings [media] cx231xx: Use wake_up_interruptible() instead of wake_up_interruptible_nr() [media] tc358743: only queue subdev notifications if devnode is set [media] tc358743: add missing Kconfig dependency/select [media] c8sectpfe: Use %pad to print 'dma_addr_t' [media] DocBook media: Fix typo "the the" in xml files [media] tc358743: make reset gpio optional [media] tc358743: set direction of reset gpio using devm_gpiod_get [media] dvbdev: document most of the functions/data structs [media] dvb_frontend.h: document the struct dvb_frontend [media] dvb-frontend.h: document struct dtv_frontend_properties [media] dvb-frontend.h: document struct dvb_frontend_ops [media] dvb: Use DVBFE_ALGO_HW where applicable [media] dvb_frontend.h: document struct analog_demod_ops [media] dvb_frontend.h: Document struct dvb_tuner_ops [media] Docbook: Document struct analog_parameters [media] dvb_frontend.h: get rid of dvbfe_modcod [media] add documentation for struct dvb_tuner_info [media] dvb_frontend: document dvb_frontend_tune_settings ...
Diffstat (limited to 'drivers/media/dvb-frontends')
-rw-r--r--drivers/media/dvb-frontends/Kconfig32
-rw-r--r--drivers/media/dvb-frontends/Makefile4
-rw-r--r--drivers/media/dvb-frontends/a8293.c168
-rw-r--r--drivers/media/dvb-frontends/a8293.h22
-rw-r--r--drivers/media/dvb-frontends/af9033.c1
-rw-r--r--drivers/media/dvb-frontends/ascot2e.c548
-rw-r--r--drivers/media/dvb-frontends/ascot2e.h58
-rw-r--r--drivers/media/dvb-frontends/au8522_decoder.c1
-rw-r--r--drivers/media/dvb-frontends/cx24123.c2
-rw-r--r--drivers/media/dvb-frontends/cxd2841er.c2727
-rw-r--r--drivers/media/dvb-frontends/cxd2841er.h65
-rw-r--r--drivers/media/dvb-frontends/cxd2841er_priv.h43
-rw-r--r--drivers/media/dvb-frontends/dvb-pll.c50
-rw-r--r--drivers/media/dvb-frontends/horus3a.c430
-rw-r--r--drivers/media/dvb-frontends/horus3a.h58
-rw-r--r--drivers/media/dvb-frontends/lnbh25.c189
-rw-r--r--drivers/media/dvb-frontends/lnbh25.h56
-rw-r--r--drivers/media/dvb-frontends/m88ds3103.c1
-rw-r--r--drivers/media/dvb-frontends/rtl2830.c1
-rw-r--r--drivers/media/dvb-frontends/rtl2832.c1
-rw-r--r--drivers/media/dvb-frontends/rtl2832_sdr.c1
-rw-r--r--drivers/media/dvb-frontends/s921.c2
-rw-r--r--drivers/media/dvb-frontends/si2168.c1
-rw-r--r--drivers/media/dvb-frontends/sp2.c1
-rw-r--r--drivers/media/dvb-frontends/stv0367.c17
-rw-r--r--drivers/media/dvb-frontends/tda10071.c825
-rw-r--r--drivers/media/dvb-frontends/tda10071.h63
-rw-r--r--drivers/media/dvb-frontends/tda10071_priv.h20
-rw-r--r--drivers/media/dvb-frontends/ts2020.c1
29 files changed, 4626 insertions, 762 deletions
diff --git a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig
index 5ab90f36a6a6..292c9479bb75 100644
--- a/drivers/media/dvb-frontends/Kconfig
+++ b/drivers/media/dvb-frontends/Kconfig
@@ -1,5 +1,5 @@
menu "Customise DVB Frontends"
- visible if !MEDIA_SUBDRV_AUTOSELECT
+ visible if !MEDIA_SUBDRV_AUTOSELECT || COMPILE_TEST
comment "Multistandard (satellite) frontends"
depends on DVB_CORE
@@ -264,6 +264,7 @@ config DVB_MB86A16
config DVB_TDA10071
tristate "NXP TDA10071"
depends on DVB_CORE && I2C
+ select REGMAP
default m if !MEDIA_SUBDRV_AUTOSELECT
help
Say Y when you want to support this frontend.
@@ -450,6 +451,13 @@ config DVB_CXD2820R
help
Say Y when you want to support this frontend.
+config DVB_CXD2841ER
+ tristate "Sony CXD2841ER"
+ depends on DVB_CORE && I2C
+ default m if !MEDIA_SUBDRV_AUTOSELECT
+ help
+ Say Y when you want to support this frontend.
+
config DVB_RTL2830
tristate "Realtek RTL2830 DVB-T"
depends on DVB_CORE && I2C && I2C_MUX
@@ -712,6 +720,14 @@ comment "SEC control devices for DVB-S"
source "drivers/media/dvb-frontends/drx39xyj/Kconfig"
+config DVB_LNBH25
+ tristate "LNBH25 SEC controller"
+ depends on DVB_CORE && I2C
+ default m if !MEDIA_SUBDRV_AUTOSELECT
+ help
+ An SEC control chip.
+ Say Y when you want to support this chip.
+
config DVB_LNBP21
tristate "LNBP21/LNBH24 SEC controllers"
depends on DVB_CORE && I2C
@@ -815,6 +831,20 @@ config DVB_AF9033
depends on DVB_CORE && I2C
default m if !MEDIA_SUBDRV_AUTOSELECT
+config DVB_HORUS3A
+ tristate "Sony Horus3A tuner"
+ depends on DVB_CORE && I2C
+ default m if !MEDIA_SUBDRV_AUTOSELECT
+ help
+ Say Y when you want to support this frontend.
+
+config DVB_ASCOT2E
+ tristate "Sony Ascot2E tuner"
+ depends on DVB_CORE && I2C
+ default m if !MEDIA_SUBDRV_AUTOSELECT
+ help
+ Say Y when you want to support this frontend.
+
comment "Tools to develop new frontends"
config DVB_DUMMY_FE
diff --git a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile
index ebab1b83e1fc..37ef17b5b995 100644
--- a/drivers/media/dvb-frontends/Makefile
+++ b/drivers/media/dvb-frontends/Makefile
@@ -57,6 +57,7 @@ obj-$(CONFIG_DVB_LGDT3305) += lgdt3305.o
obj-$(CONFIG_DVB_LGDT3306A) += lgdt3306a.o
obj-$(CONFIG_DVB_LG2160) += lg2160.o
obj-$(CONFIG_DVB_CX24123) += cx24123.o
+obj-$(CONFIG_DVB_LNBH25) += lnbh25.o
obj-$(CONFIG_DVB_LNBP21) += lnbp21.o
obj-$(CONFIG_DVB_LNBP22) += lnbp22.o
obj-$(CONFIG_DVB_ISL6405) += isl6405.o
@@ -105,6 +106,7 @@ obj-$(CONFIG_DVB_MB86A20S) += mb86a20s.o
obj-$(CONFIG_DVB_IX2505V) += ix2505v.o
obj-$(CONFIG_DVB_STV0367) += stv0367.o
obj-$(CONFIG_DVB_CXD2820R) += cxd2820r.o
+obj-$(CONFIG_DVB_CXD2841ER) += cxd2841er.o
obj-$(CONFIG_DVB_DRXK) += drxk.o
obj-$(CONFIG_DVB_TDA18271C2DD) += tda18271c2dd.o
obj-$(CONFIG_DVB_SI2165) += si2165.o
@@ -118,3 +120,5 @@ obj-$(CONFIG_DVB_M88RS2000) += m88rs2000.o
obj-$(CONFIG_DVB_AF9033) += af9033.o
obj-$(CONFIG_DVB_AS102_FE) += as102_fe.o
obj-$(CONFIG_DVB_TC90522) += tc90522.o
+obj-$(CONFIG_DVB_HORUS3A) += horus3a.o
+obj-$(CONFIG_DVB_ASCOT2E) += ascot2e.o
diff --git a/drivers/media/dvb-frontends/a8293.c b/drivers/media/dvb-frontends/a8293.c
index 97ecbe01034c..e1e9bddcf516 100644
--- a/drivers/media/dvb-frontends/a8293.c
+++ b/drivers/media/dvb-frontends/a8293.c
@@ -12,163 +12,69 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
-#include "dvb_frontend.h"
#include "a8293.h"
-struct a8293_priv {
- u8 i2c_addr;
- struct i2c_adapter *i2c;
+struct a8293_dev {
struct i2c_client *client;
u8 reg[2];
};
-static int a8293_i2c(struct a8293_priv *priv, u8 *val, int len, bool rd)
-{
- int ret;
- struct i2c_msg msg[1] = {
- {
- .addr = priv->i2c_addr,
- .len = len,
- .buf = val,
- }
- };
-
- if (rd)
- msg[0].flags = I2C_M_RD;
- else
- msg[0].flags = 0;
-
- ret = i2c_transfer(priv->i2c, msg, 1);
- if (ret == 1) {
- ret = 0;
- } else {
- dev_warn(&priv->i2c->dev, "%s: i2c failed=%d rd=%d\n",
- KBUILD_MODNAME, ret, rd);
- ret = -EREMOTEIO;
- }
-
- return ret;
-}
-
-static int a8293_wr(struct a8293_priv *priv, u8 *val, int len)
-{
- return a8293_i2c(priv, val, len, 0);
-}
-
-static int a8293_rd(struct a8293_priv *priv, u8 *val, int len)
-{
- return a8293_i2c(priv, val, len, 1);
-}
-
static int a8293_set_voltage(struct dvb_frontend *fe,
- enum fe_sec_voltage fe_sec_voltage)
+ enum fe_sec_voltage fe_sec_voltage)
{
- struct a8293_priv *priv = fe->sec_priv;
+ struct a8293_dev *dev = fe->sec_priv;
+ struct i2c_client *client = dev->client;
int ret;
+ u8 reg0, reg1;
- dev_dbg(&priv->i2c->dev, "%s: fe_sec_voltage=%d\n", __func__,
- fe_sec_voltage);
+ dev_dbg(&client->dev, "fe_sec_voltage=%d\n", fe_sec_voltage);
switch (fe_sec_voltage) {
case SEC_VOLTAGE_OFF:
/* ENB=0 */
- priv->reg[0] = 0x10;
+ reg0 = 0x10;
break;
case SEC_VOLTAGE_13:
/* VSEL0=1, VSEL1=0, VSEL2=0, VSEL3=0, ENB=1*/
- priv->reg[0] = 0x31;
+ reg0 = 0x31;
break;
case SEC_VOLTAGE_18:
/* VSEL0=0, VSEL1=0, VSEL2=0, VSEL3=1, ENB=1*/
- priv->reg[0] = 0x38;
+ reg0 = 0x38;
break;
default:
ret = -EINVAL;
goto err;
}
-
- ret = a8293_wr(priv, &priv->reg[0], 1);
- if (ret)
- goto err;
-
- usleep_range(1500, 50000);
-
- return ret;
-err:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
- return ret;
-}
-
-static void a8293_release_sec(struct dvb_frontend *fe)
-{
- a8293_set_voltage(fe, SEC_VOLTAGE_OFF);
-
- kfree(fe->sec_priv);
- fe->sec_priv = NULL;
-}
-
-struct dvb_frontend *a8293_attach(struct dvb_frontend *fe,
- struct i2c_adapter *i2c, const struct a8293_config *cfg)
-{
- int ret;
- struct a8293_priv *priv = NULL;
- u8 buf[2];
-
- /* allocate memory for the internal priv */
- priv = kzalloc(sizeof(struct a8293_priv), GFP_KERNEL);
- if (priv == NULL) {
- ret = -ENOMEM;
- goto err;
+ if (reg0 != dev->reg[0]) {
+ ret = i2c_master_send(client, &reg0, 1);
+ if (ret < 0)
+ goto err;
+ dev->reg[0] = reg0;
}
- /* setup the priv */
- priv->i2c = i2c;
- priv->i2c_addr = cfg->i2c_addr;
- fe->sec_priv = priv;
-
- /* check if the SEC is there */
- ret = a8293_rd(priv, buf, 2);
- if (ret)
- goto err;
-
- /* ENB=0 */
- priv->reg[0] = 0x10;
- ret = a8293_wr(priv, &priv->reg[0], 1);
- if (ret)
- goto err;
-
/* TMODE=0, TGATE=1 */
- priv->reg[1] = 0x82;
- ret = a8293_wr(priv, &priv->reg[1], 1);
- if (ret)
- goto err;
-
- fe->ops.release_sec = a8293_release_sec;
-
- /* override frontend ops */
- fe->ops.set_voltage = a8293_set_voltage;
-
- dev_info(&priv->i2c->dev, "%s: Allegro A8293 SEC attached\n",
- KBUILD_MODNAME);
+ reg1 = 0x82;
+ if (reg1 != dev->reg[1]) {
+ ret = i2c_master_send(client, &reg1, 1);
+ if (ret < 0)
+ goto err;
+ dev->reg[1] = reg1;
+ }
- return fe;
+ usleep_range(1500, 50000);
+ return 0;
err:
- dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
- kfree(priv);
- return NULL;
+ dev_dbg(&client->dev, "failed=%d\n", ret);
+ return ret;
}
-EXPORT_SYMBOL(a8293_attach);
static int a8293_probe(struct i2c_client *client,
- const struct i2c_device_id *id)
+ const struct i2c_device_id *id)
{
- struct a8293_priv *dev;
+ struct a8293_dev *dev;
struct a8293_platform_data *pdata = client->dev.platform_data;
struct dvb_frontend *fe = pdata->dvb_frontend;
int ret;
@@ -181,29 +87,14 @@ static int a8293_probe(struct i2c_client *client,
}
dev->client = client;
- dev->i2c = client->adapter;
- dev->i2c_addr = client->addr;
/* check if the SEC is there */
- ret = a8293_rd(dev, buf, 2);
- if (ret)
- goto err_kfree;
-
- /* ENB=0 */
- dev->reg[0] = 0x10;
- ret = a8293_wr(dev, &dev->reg[0], 1);
- if (ret)
- goto err_kfree;
-
- /* TMODE=0, TGATE=1 */
- dev->reg[1] = 0x82;
- ret = a8293_wr(dev, &dev->reg[1], 1);
- if (ret)
+ ret = i2c_master_recv(client, buf, 2);
+ if (ret < 0)
goto err_kfree;
/* override frontend ops */
fe->ops.set_voltage = a8293_set_voltage;
-
fe->sec_priv = dev;
i2c_set_clientdata(client, dev);
@@ -234,7 +125,6 @@ MODULE_DEVICE_TABLE(i2c, a8293_id_table);
static struct i2c_driver a8293_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "a8293",
.suppress_bind_attrs = true,
},
diff --git a/drivers/media/dvb-frontends/a8293.h b/drivers/media/dvb-frontends/a8293.h
index aff36538f582..7b90a03fcd0a 100644
--- a/drivers/media/dvb-frontends/a8293.h
+++ b/drivers/media/dvb-frontends/a8293.h
@@ -12,17 +12,12 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#ifndef A8293_H
#define A8293_H
#include "dvb_frontend.h"
-#include <linux/kconfig.h>
/*
* I2C address
@@ -37,21 +32,4 @@ struct a8293_platform_data {
struct dvb_frontend *dvb_frontend;
};
-
-struct a8293_config {
- u8 i2c_addr;
-};
-
-#if IS_REACHABLE(CONFIG_DVB_A8293)
-extern struct dvb_frontend *a8293_attach(struct dvb_frontend *fe,
- struct i2c_adapter *i2c, const struct a8293_config *cfg);
-#else
-static inline struct dvb_frontend *a8293_attach(struct dvb_frontend *fe,
- struct i2c_adapter *i2c, const struct a8293_config *cfg)
-{
- printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
- return NULL;
-}
-#endif
-
#endif /* A8293_H */
diff --git a/drivers/media/dvb-frontends/af9033.c b/drivers/media/dvb-frontends/af9033.c
index 59018afaa95f..bc35206a0821 100644
--- a/drivers/media/dvb-frontends/af9033.c
+++ b/drivers/media/dvb-frontends/af9033.c
@@ -1387,7 +1387,6 @@ MODULE_DEVICE_TABLE(i2c, af9033_id_table);
static struct i2c_driver af9033_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "af9033",
},
.probe = af9033_probe,
diff --git a/drivers/media/dvb-frontends/ascot2e.c b/drivers/media/dvb-frontends/ascot2e.c
new file mode 100644
index 000000000000..f770f6a2c987
--- /dev/null
+++ b/drivers/media/dvb-frontends/ascot2e.c
@@ -0,0 +1,548 @@
+/*
+ * ascot2e.c
+ *
+ * Sony Ascot3E DVB-T/T2/C/C2 tuner driver
+ *
+ * Copyright 2012 Sony Corporation
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/dvb/frontend.h>
+#include <linux/types.h>
+#include "ascot2e.h"
+#include "dvb_frontend.h"
+
+#define MAX_WRITE_REGSIZE 10
+
+enum ascot2e_state {
+ STATE_UNKNOWN,
+ STATE_SLEEP,
+ STATE_ACTIVE
+};
+
+struct ascot2e_priv {
+ u32 frequency;
+ u8 i2c_address;
+ struct i2c_adapter *i2c;
+ enum ascot2e_state state;
+ void *set_tuner_data;
+ int (*set_tuner)(void *, int);
+};
+
+enum ascot2e_tv_system_t {
+ ASCOT2E_DTV_DVBT_5,
+ ASCOT2E_DTV_DVBT_6,
+ ASCOT2E_DTV_DVBT_7,
+ ASCOT2E_DTV_DVBT_8,
+ ASCOT2E_DTV_DVBT2_1_7,
+ ASCOT2E_DTV_DVBT2_5,
+ ASCOT2E_DTV_DVBT2_6,
+ ASCOT2E_DTV_DVBT2_7,
+ ASCOT2E_DTV_DVBT2_8,
+ ASCOT2E_DTV_DVBC_6,
+ ASCOT2E_DTV_DVBC_8,
+ ASCOT2E_DTV_DVBC2_6,
+ ASCOT2E_DTV_DVBC2_8,
+ ASCOT2E_DTV_UNKNOWN
+};
+
+struct ascot2e_band_sett {
+ u8 if_out_sel;
+ u8 agc_sel;
+ u8 mix_oll;
+ u8 rf_gain;
+ u8 if_bpf_gc;
+ u8 fif_offset;
+ u8 bw_offset;
+ u8 bw;
+ u8 rf_oldet;
+ u8 if_bpf_f0;
+};
+
+#define ASCOT2E_AUTO 0xff
+#define ASCOT2E_OFFSET(ofs) ((u8)(ofs) & 0x1F)
+#define ASCOT2E_BW_6 0x00
+#define ASCOT2E_BW_7 0x01
+#define ASCOT2E_BW_8 0x02
+#define ASCOT2E_BW_1_7 0x03
+
+static struct ascot2e_band_sett ascot2e_sett[] = {
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_7, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-4), ASCOT2E_OFFSET(-2), ASCOT2E_BW_8, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-10), ASCOT2E_OFFSET(-16), ASCOT2E_BW_1_7, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-8), ASCOT2E_OFFSET(-6), ASCOT2E_BW_6, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_7, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x06,
+ ASCOT2E_OFFSET(-4), ASCOT2E_OFFSET(-2), ASCOT2E_BW_8, 0x0B, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x02, ASCOT2E_AUTO, 0x03,
+ ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-8), ASCOT2E_BW_6, 0x09, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x02, ASCOT2E_AUTO, 0x03,
+ ASCOT2E_OFFSET(-2), ASCOT2E_OFFSET(-1), ASCOT2E_BW_8, 0x09, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x01,
+ ASCOT2E_OFFSET(-6), ASCOT2E_OFFSET(-4), ASCOT2E_BW_6, 0x09, 0x00 },
+ { ASCOT2E_AUTO, ASCOT2E_AUTO, 0x03, ASCOT2E_AUTO, 0x01,
+ ASCOT2E_OFFSET(-2), ASCOT2E_OFFSET(2), ASCOT2E_BW_8, 0x09, 0x00 }
+};
+
+static void ascot2e_i2c_debug(struct ascot2e_priv *priv,
+ u8 reg, u8 write, const u8 *data, u32 len)
+{
+ dev_dbg(&priv->i2c->dev, "ascot2e: I2C %s reg 0x%02x size %d\n",
+ (write == 0 ? "read" : "write"), reg, len);
+ print_hex_dump_bytes("ascot2e: I2C data: ",
+ DUMP_PREFIX_OFFSET, data, len);
+}
+
+static int ascot2e_write_regs(struct ascot2e_priv *priv,
+ u8 reg, const u8 *data, u32 len)
+{
+ int ret;
+ u8 buf[MAX_WRITE_REGSIZE + 1];
+ struct i2c_msg msg[1] = {
+ {
+ .addr = priv->i2c_address,
+ .flags = 0,
+ .len = len + 1,
+ .buf = buf,
+ }
+ };
+
+ if (len + 1 >= sizeof(buf)) {
+ dev_warn(&priv->i2c->dev,"wr reg=%04x: len=%d is too big!\n",
+ reg, len + 1);
+ return -E2BIG;
+ }
+
+ ascot2e_i2c_debug(priv, reg, 1, data, len);
+ buf[0] = reg;
+ memcpy(&buf[1], data, len);
+ ret = i2c_transfer(priv->i2c, msg, 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EREMOTEIO;
+ if (ret < 0) {
+ dev_warn(&priv->i2c->dev,
+ "%s: i2c wr failed=%d reg=%02x len=%d\n",
+ KBUILD_MODNAME, ret, reg, len);
+ return ret;
+ }
+ return 0;
+}
+
+static int ascot2e_write_reg(struct ascot2e_priv *priv, u8 reg, u8 val)
+{
+ return ascot2e_write_regs(priv, reg, &val, 1);
+}
+
+static int ascot2e_read_regs(struct ascot2e_priv *priv,
+ u8 reg, u8 *val, u32 len)
+{
+ int ret;
+ struct i2c_msg msg[2] = {
+ {
+ .addr = priv->i2c_address,
+ .flags = 0,
+ .len = 1,
+ .buf = &reg,
+ }, {
+ .addr = priv->i2c_address,
+ .flags = I2C_M_RD,
+ .len = len,
+ .buf = val,
+ }
+ };
+
+ ret = i2c_transfer(priv->i2c, &msg[0], 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EREMOTEIO;
+ if (ret < 0) {
+ dev_warn(&priv->i2c->dev,
+ "%s: I2C rw failed=%d addr=%02x reg=%02x\n",
+ KBUILD_MODNAME, ret, priv->i2c_address, reg);
+ return ret;
+ }
+ ret = i2c_transfer(priv->i2c, &msg[1], 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EREMOTEIO;
+ if (ret < 0) {
+ dev_warn(&priv->i2c->dev,
+ "%s: i2c rd failed=%d addr=%02x reg=%02x\n",
+ KBUILD_MODNAME, ret, priv->i2c_address, reg);
+ return ret;
+ }
+ ascot2e_i2c_debug(priv, reg, 0, val, len);
+ return 0;
+}
+
+static int ascot2e_read_reg(struct ascot2e_priv *priv, u8 reg, u8 *val)
+{
+ return ascot2e_read_regs(priv, reg, val, 1);
+}
+
+static int ascot2e_set_reg_bits(struct ascot2e_priv *priv,
+ u8 reg, u8 data, u8 mask)
+{
+ int res;
+ u8 rdata;
+
+ if (mask != 0xff) {
+ res = ascot2e_read_reg(priv, reg, &rdata);
+ if (res != 0)
+ return res;
+ data = ((data & mask) | (rdata & (mask ^ 0xFF)));
+ }
+ return ascot2e_write_reg(priv, reg, data);
+}
+
+static int ascot2e_enter_power_save(struct ascot2e_priv *priv)
+{
+ u8 data[2];
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state == STATE_SLEEP)
+ return 0;
+ data[0] = 0x00;
+ data[1] = 0x04;
+ ascot2e_write_regs(priv, 0x14, data, 2);
+ ascot2e_write_reg(priv, 0x50, 0x01);
+ priv->state = STATE_SLEEP;
+ return 0;
+}
+
+static int ascot2e_leave_power_save(struct ascot2e_priv *priv)
+{
+ u8 data[2] = { 0xFB, 0x0F };
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state == STATE_ACTIVE)
+ return 0;
+ ascot2e_write_regs(priv, 0x14, data, 2);
+ ascot2e_write_reg(priv, 0x50, 0x00);
+ priv->state = STATE_ACTIVE;
+ return 0;
+}
+
+static int ascot2e_init(struct dvb_frontend *fe)
+{
+ struct ascot2e_priv *priv = fe->tuner_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ return ascot2e_leave_power_save(priv);
+}
+
+static int ascot2e_release(struct dvb_frontend *fe)
+{
+ struct ascot2e_priv *priv = fe->tuner_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ kfree(fe->tuner_priv);
+ fe->tuner_priv = NULL;
+ return 0;
+}
+
+static int ascot2e_sleep(struct dvb_frontend *fe)
+{
+ struct ascot2e_priv *priv = fe->tuner_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ ascot2e_enter_power_save(priv);
+ return 0;
+}
+
+static enum ascot2e_tv_system_t ascot2e_get_tv_system(struct dvb_frontend *fe)
+{
+ enum ascot2e_tv_system_t system = ASCOT2E_DTV_UNKNOWN;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ struct ascot2e_priv *priv = fe->tuner_priv;
+
+ if (p->delivery_system == SYS_DVBT) {
+ if (p->bandwidth_hz <= 5000000)
+ system = ASCOT2E_DTV_DVBT_5;
+ else if (p->bandwidth_hz <= 6000000)
+ system = ASCOT2E_DTV_DVBT_6;
+ else if (p->bandwidth_hz <= 7000000)
+ system = ASCOT2E_DTV_DVBT_7;
+ else if (p->bandwidth_hz <= 8000000)
+ system = ASCOT2E_DTV_DVBT_8;
+ else {
+ system = ASCOT2E_DTV_DVBT_8;
+ p->bandwidth_hz = 8000000;
+ }
+ } else if (p->delivery_system == SYS_DVBT2) {
+ if (p->bandwidth_hz <= 5000000)
+ system = ASCOT2E_DTV_DVBT2_5;
+ else if (p->bandwidth_hz <= 6000000)
+ system = ASCOT2E_DTV_DVBT2_6;
+ else if (p->bandwidth_hz <= 7000000)
+ system = ASCOT2E_DTV_DVBT2_7;
+ else if (p->bandwidth_hz <= 8000000)
+ system = ASCOT2E_DTV_DVBT2_8;
+ else {
+ system = ASCOT2E_DTV_DVBT2_8;
+ p->bandwidth_hz = 8000000;
+ }
+ } else if (p->delivery_system == SYS_DVBC_ANNEX_A) {
+ if (p->bandwidth_hz <= 6000000)
+ system = ASCOT2E_DTV_DVBC_6;
+ else if (p->bandwidth_hz <= 8000000)
+ system = ASCOT2E_DTV_DVBC_8;
+ }
+ dev_dbg(&priv->i2c->dev,
+ "%s(): ASCOT2E DTV system %d (delsys %d, bandwidth %d)\n",
+ __func__, (int)system, p->delivery_system, p->bandwidth_hz);
+ return system;
+}
+
+static int ascot2e_set_params(struct dvb_frontend *fe)
+{
+ u8 data[10];
+ u32 frequency;
+ enum ascot2e_tv_system_t tv_system;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ struct ascot2e_priv *priv = fe->tuner_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s(): tune frequency %dkHz\n",
+ __func__, p->frequency / 1000);
+ tv_system = ascot2e_get_tv_system(fe);
+
+ if (tv_system == ASCOT2E_DTV_UNKNOWN) {
+ dev_dbg(&priv->i2c->dev, "%s(): unknown DTV system\n",
+ __func__);
+ return -EINVAL;
+ }
+ if (priv->set_tuner)
+ priv->set_tuner(priv->set_tuner_data, 1);
+ frequency = roundup(p->frequency / 1000, 25);
+ if (priv->state == STATE_SLEEP)
+ ascot2e_leave_power_save(priv);
+
+ /* IF_OUT_SEL / AGC_SEL setting */
+ data[0] = 0x00;
+ if (ascot2e_sett[tv_system].agc_sel != ASCOT2E_AUTO) {
+ /* AGC pin setting from parameter table */
+ data[0] |= (u8)(
+ (ascot2e_sett[tv_system].agc_sel & 0x03) << 3);
+ }
+ if (ascot2e_sett[tv_system].if_out_sel != ASCOT2E_AUTO) {
+ /* IFOUT pin setting from parameter table */
+ data[0] |= (u8)(
+ (ascot2e_sett[tv_system].if_out_sel & 0x01) << 2);
+ }
+ /* Set bit[4:2] only */
+ ascot2e_set_reg_bits(priv, 0x05, data[0], 0x1c);
+ /* 0x06 - 0x0F */
+ /* REF_R setting (0x06) */
+ if (tv_system == ASCOT2E_DTV_DVBC_6 ||
+ tv_system == ASCOT2E_DTV_DVBC_8) {
+ /* xtal, xtal*2 */
+ data[0] = (frequency > 500000) ? 16 : 32;
+ } else {
+ /* xtal/8, xtal/4 */
+ data[0] = (frequency > 500000) ? 2 : 4;
+ }
+ /* XOSC_SEL=100uA */
+ data[1] = 0x04;
+ /* KBW setting (0x08), KC0 setting (0x09), KC1 setting (0x0A) */
+ if (tv_system == ASCOT2E_DTV_DVBC_6 ||
+ tv_system == ASCOT2E_DTV_DVBC_8) {
+ data[2] = 18;
+ data[3] = 120;
+ data[4] = 20;
+ } else {
+ data[2] = 48;
+ data[3] = 10;
+ data[4] = 30;
+ }
+ /* ORDER/R2_RANGE/R2_BANK/C2_BANK setting (0x0B) */
+ if (tv_system == ASCOT2E_DTV_DVBC_6 ||
+ tv_system == ASCOT2E_DTV_DVBC_8)
+ data[5] = (frequency > 500000) ? 0x08 : 0x0c;
+ else
+ data[5] = (frequency > 500000) ? 0x30 : 0x38;
+ /* Set MIX_OLL (0x0C) value from parameter table */
+ data[6] = ascot2e_sett[tv_system].mix_oll;
+ /* Set RF_GAIN (0x0D) setting from parameter table */
+ if (ascot2e_sett[tv_system].rf_gain == ASCOT2E_AUTO) {
+ /* RF_GAIN auto control enable */
+ ascot2e_write_reg(priv, 0x4E, 0x01);
+ /* RF_GAIN Default value */
+ data[7] = 0x00;
+ } else {
+ /* RF_GAIN auto control disable */
+ ascot2e_write_reg(priv, 0x4E, 0x00);
+ data[7] = ascot2e_sett[tv_system].rf_gain;
+ }
+ /* Set IF_BPF_GC/FIF_OFFSET (0x0E) value from parameter table */
+ data[8] = (u8)((ascot2e_sett[tv_system].fif_offset << 3) |
+ (ascot2e_sett[tv_system].if_bpf_gc & 0x07));
+ /* Set BW_OFFSET (0x0F) value from parameter table */
+ data[9] = ascot2e_sett[tv_system].bw_offset;
+ ascot2e_write_regs(priv, 0x06, data, 10);
+ /*
+ * 0x45 - 0x47
+ * LNA optimization setting
+ * RF_LNA_DIST1-5, RF_LNA_CM
+ */
+ if (tv_system == ASCOT2E_DTV_DVBC_6 ||
+ tv_system == ASCOT2E_DTV_DVBC_8) {
+ data[0] = 0x0F;
+ data[1] = 0x00;
+ data[2] = 0x01;
+ } else {
+ data[0] = 0x0F;
+ data[1] = 0x00;
+ data[2] = 0x03;
+ }
+ ascot2e_write_regs(priv, 0x45, data, 3);
+ /* 0x49 - 0x4A
+ Set RF_OLDET_ENX/RF_OLDET_OLL value from parameter table */
+ data[0] = ascot2e_sett[tv_system].rf_oldet;
+ /* Set IF_BPF_F0 value from parameter table */
+ data[1] = ascot2e_sett[tv_system].if_bpf_f0;
+ ascot2e_write_regs(priv, 0x49, data, 2);
+ /*
+ * Tune now
+ * RFAGC fast mode / RFAGC auto control enable
+ * (set bit[7], bit[5:4] only)
+ * vco_cal = 1, set MIX_OL_CPU_EN
+ */
+ ascot2e_set_reg_bits(priv, 0x0c, 0x90, 0xb0);
+ /* Logic wake up, CPU wake up */
+ data[0] = 0xc4;
+ data[1] = 0x40;
+ ascot2e_write_regs(priv, 0x03, data, 2);
+ /* 0x10 - 0x14 */
+ data[0] = (u8)(frequency & 0xFF); /* 0x10: FRF_L */
+ data[1] = (u8)((frequency >> 8) & 0xFF); /* 0x11: FRF_M */
+ data[2] = (u8)((frequency >> 16) & 0x0F); /* 0x12: FRF_H (bit[3:0]) */
+ /* 0x12: BW (bit[5:4]) */
+ data[2] |= (u8)(ascot2e_sett[tv_system].bw << 4);
+ data[3] = 0xFF; /* 0x13: VCO calibration enable */
+ data[4] = 0xFF; /* 0x14: Analog block enable */
+ /* Tune (Burst write) */
+ ascot2e_write_regs(priv, 0x10, data, 5);
+ msleep(50);
+ /* CPU deep sleep */
+ ascot2e_write_reg(priv, 0x04, 0x00);
+ /* Logic sleep */
+ ascot2e_write_reg(priv, 0x03, 0xC0);
+ /* RFAGC normal mode (set bit[5:4] only) */
+ ascot2e_set_reg_bits(priv, 0x0C, 0x00, 0x30);
+ priv->frequency = frequency;
+ return 0;
+}
+
+static int ascot2e_get_frequency(struct dvb_frontend *fe, u32 *frequency)
+{
+ struct ascot2e_priv *priv = fe->tuner_priv;
+
+ *frequency = priv->frequency * 1000;
+ return 0;
+}
+
+static struct dvb_tuner_ops ascot2e_tuner_ops = {
+ .info = {
+ .name = "Sony ASCOT2E",
+ .frequency_min = 1000000,
+ .frequency_max = 1200000000,
+ .frequency_step = 25000,
+ },
+ .init = ascot2e_init,
+ .release = ascot2e_release,
+ .sleep = ascot2e_sleep,
+ .set_params = ascot2e_set_params,
+ .get_frequency = ascot2e_get_frequency,
+};
+
+struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe,
+ const struct ascot2e_config *config,
+ struct i2c_adapter *i2c)
+{
+ u8 data[4];
+ struct ascot2e_priv *priv = NULL;
+
+ priv = kzalloc(sizeof(struct ascot2e_priv), GFP_KERNEL);
+ if (priv == NULL)
+ return NULL;
+ priv->i2c_address = (config->i2c_address >> 1);
+ priv->i2c = i2c;
+ priv->set_tuner_data = config->set_tuner_priv;
+ priv->set_tuner = config->set_tuner_callback;
+
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 1);
+
+ /* 16 MHz xTal frequency */
+ data[0] = 16;
+ /* VCO current setting */
+ data[1] = 0x06;
+ /* Logic wake up, CPU boot */
+ data[2] = 0xC4;
+ data[3] = 0x40;
+ ascot2e_write_regs(priv, 0x01, data, 4);
+ /* RFVGA optimization setting (RF_DIST0 - RF_DIST2) */
+ data[0] = 0x10;
+ data[1] = 0x3F;
+ data[2] = 0x25;
+ ascot2e_write_regs(priv, 0x22, data, 3);
+ /* PLL mode setting */
+ ascot2e_write_reg(priv, 0x28, 0x1e);
+ /* RSSI setting */
+ ascot2e_write_reg(priv, 0x59, 0x04);
+ /* TODO check CPU HW error state here */
+ msleep(80);
+ /* Xtal oscillator current control setting */
+ ascot2e_write_reg(priv, 0x4c, 0x01);
+ /* XOSC_SEL=100uA */
+ ascot2e_write_reg(priv, 0x07, 0x04);
+ /* CPU deep sleep */
+ ascot2e_write_reg(priv, 0x04, 0x00);
+ /* Logic sleep */
+ ascot2e_write_reg(priv, 0x03, 0xc0);
+ /* Power save setting */
+ data[0] = 0x00;
+ data[1] = 0x04;
+ ascot2e_write_regs(priv, 0x14, data, 2);
+ ascot2e_write_reg(priv, 0x50, 0x01);
+ priv->state = STATE_SLEEP;
+
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 0);
+
+ memcpy(&fe->ops.tuner_ops, &ascot2e_tuner_ops,
+ sizeof(struct dvb_tuner_ops));
+ fe->tuner_priv = priv;
+ dev_info(&priv->i2c->dev,
+ "Sony ASCOT2E attached on addr=%x at I2C adapter %p\n",
+ priv->i2c_address, priv->i2c);
+ return fe;
+}
+EXPORT_SYMBOL(ascot2e_attach);
+
+MODULE_DESCRIPTION("Sony ASCOT2E terr/cab tuner driver");
+MODULE_AUTHOR("info@netup.ru");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb-frontends/ascot2e.h b/drivers/media/dvb-frontends/ascot2e.h
new file mode 100644
index 000000000000..6da4ae6d6cc3
--- /dev/null
+++ b/drivers/media/dvb-frontends/ascot2e.h
@@ -0,0 +1,58 @@
+/*
+ * ascot2e.h
+ *
+ * Sony Ascot3E DVB-T/T2/C/C2 tuner driver
+ *
+ * Copyright 2012 Sony Corporation
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DVB_ASCOT2E_H__
+#define __DVB_ASCOT2E_H__
+
+#include <linux/kconfig.h>
+#include <linux/dvb/frontend.h>
+#include <linux/i2c.h>
+
+/**
+ * struct ascot2e_config - the configuration of Ascot2E tuner driver
+ * @i2c_address: I2C address of the tuner
+ * @xtal_freq_mhz: Oscillator frequency, MHz
+ * @set_tuner_priv: Callback function private context
+ * @set_tuner_callback: Callback function that notifies the parent driver
+ * which tuner is active now
+ */
+struct ascot2e_config {
+ u8 i2c_address;
+ u8 xtal_freq_mhz;
+ void *set_tuner_priv;
+ int (*set_tuner_callback)(void *, int);
+};
+
+#if IS_REACHABLE(CONFIG_DVB_ASCOT2E)
+extern struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe,
+ const struct ascot2e_config *config,
+ struct i2c_adapter *i2c);
+#else
+static inline struct dvb_frontend *ascot2e_attach(struct dvb_frontend *fe,
+ const struct ascot2e_config *config,
+ struct i2c_adapter *i2c)
+{
+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+ return NULL;
+}
+#endif
+
+#endif
diff --git a/drivers/media/dvb-frontends/au8522_decoder.c b/drivers/media/dvb-frontends/au8522_decoder.c
index 33aa9410b624..28d7dc2fee34 100644
--- a/drivers/media/dvb-frontends/au8522_decoder.c
+++ b/drivers/media/dvb-frontends/au8522_decoder.c
@@ -820,7 +820,6 @@ MODULE_DEVICE_TABLE(i2c, au8522_id);
static struct i2c_driver au8522_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "au8522",
},
.probe = au8522_probe,
diff --git a/drivers/media/dvb-frontends/cx24123.c b/drivers/media/dvb-frontends/cx24123.c
index e18cf9e1185e..0fe7fb11124b 100644
--- a/drivers/media/dvb-frontends/cx24123.c
+++ b/drivers/media/dvb-frontends/cx24123.c
@@ -1011,7 +1011,7 @@ static int cx24123_tune(struct dvb_frontend *fe,
static int cx24123_get_algo(struct dvb_frontend *fe)
{
- return 1; /* FE_ALGO_HW */
+ return DVBFE_ALGO_HW;
}
static void cx24123_release(struct dvb_frontend *fe)
diff --git a/drivers/media/dvb-frontends/cxd2841er.c b/drivers/media/dvb-frontends/cxd2841er.c
new file mode 100644
index 000000000000..fdffb2f0ded8
--- /dev/null
+++ b/drivers/media/dvb-frontends/cxd2841er.c
@@ -0,0 +1,2727 @@
+/*
+ * cxd2841er.c
+ *
+ * Sony CXD2441ER digital demodulator driver
+ *
+ * Copyright 2012 Sony Corporation
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+#include <linux/bitops.h>
+#include <linux/math64.h>
+#include <linux/log2.h>
+#include <linux/dynamic_debug.h>
+
+#include "dvb_math.h"
+#include "dvb_frontend.h"
+#include "cxd2841er.h"
+#include "cxd2841er_priv.h"
+
+#define MAX_WRITE_REGSIZE 16
+
+enum cxd2841er_state {
+ STATE_SHUTDOWN = 0,
+ STATE_SLEEP_S,
+ STATE_ACTIVE_S,
+ STATE_SLEEP_TC,
+ STATE_ACTIVE_TC
+};
+
+struct cxd2841er_priv {
+ struct dvb_frontend frontend;
+ struct i2c_adapter *i2c;
+ u8 i2c_addr_slvx;
+ u8 i2c_addr_slvt;
+ const struct cxd2841er_config *config;
+ enum cxd2841er_state state;
+ u8 system;
+};
+
+static const struct cxd2841er_cnr_data s_cn_data[] = {
+ { 0x033e, 0 }, { 0x0339, 100 }, { 0x0333, 200 },
+ { 0x032e, 300 }, { 0x0329, 400 }, { 0x0324, 500 },
+ { 0x031e, 600 }, { 0x0319, 700 }, { 0x0314, 800 },
+ { 0x030f, 900 }, { 0x030a, 1000 }, { 0x02ff, 1100 },
+ { 0x02f4, 1200 }, { 0x02e9, 1300 }, { 0x02de, 1400 },
+ { 0x02d4, 1500 }, { 0x02c9, 1600 }, { 0x02bf, 1700 },
+ { 0x02b5, 1800 }, { 0x02ab, 1900 }, { 0x02a1, 2000 },
+ { 0x029b, 2100 }, { 0x0295, 2200 }, { 0x0290, 2300 },
+ { 0x028a, 2400 }, { 0x0284, 2500 }, { 0x027f, 2600 },
+ { 0x0279, 2700 }, { 0x0274, 2800 }, { 0x026e, 2900 },
+ { 0x0269, 3000 }, { 0x0262, 3100 }, { 0x025c, 3200 },
+ { 0x0255, 3300 }, { 0x024f, 3400 }, { 0x0249, 3500 },
+ { 0x0242, 3600 }, { 0x023c, 3700 }, { 0x0236, 3800 },
+ { 0x0230, 3900 }, { 0x022a, 4000 }, { 0x0223, 4100 },
+ { 0x021c, 4200 }, { 0x0215, 4300 }, { 0x020e, 4400 },
+ { 0x0207, 4500 }, { 0x0201, 4600 }, { 0x01fa, 4700 },
+ { 0x01f4, 4800 }, { 0x01ed, 4900 }, { 0x01e7, 5000 },
+ { 0x01e0, 5100 }, { 0x01d9, 5200 }, { 0x01d2, 5300 },
+ { 0x01cb, 5400 }, { 0x01c4, 5500 }, { 0x01be, 5600 },
+ { 0x01b7, 5700 }, { 0x01b1, 5800 }, { 0x01aa, 5900 },
+ { 0x01a4, 6000 }, { 0x019d, 6100 }, { 0x0196, 6200 },
+ { 0x018f, 6300 }, { 0x0189, 6400 }, { 0x0182, 6500 },
+ { 0x017c, 6600 }, { 0x0175, 6700 }, { 0x016f, 6800 },
+ { 0x0169, 6900 }, { 0x0163, 7000 }, { 0x015c, 7100 },
+ { 0x0156, 7200 }, { 0x0150, 7300 }, { 0x014a, 7400 },
+ { 0x0144, 7500 }, { 0x013e, 7600 }, { 0x0138, 7700 },
+ { 0x0132, 7800 }, { 0x012d, 7900 }, { 0x0127, 8000 },
+ { 0x0121, 8100 }, { 0x011c, 8200 }, { 0x0116, 8300 },
+ { 0x0111, 8400 }, { 0x010b, 8500 }, { 0x0106, 8600 },
+ { 0x0101, 8700 }, { 0x00fc, 8800 }, { 0x00f7, 8900 },
+ { 0x00f2, 9000 }, { 0x00ee, 9100 }, { 0x00ea, 9200 },
+ { 0x00e6, 9300 }, { 0x00e2, 9400 }, { 0x00de, 9500 },
+ { 0x00da, 9600 }, { 0x00d7, 9700 }, { 0x00d3, 9800 },
+ { 0x00d0, 9900 }, { 0x00cc, 10000 }, { 0x00c7, 10100 },
+ { 0x00c3, 10200 }, { 0x00bf, 10300 }, { 0x00ba, 10400 },
+ { 0x00b6, 10500 }, { 0x00b2, 10600 }, { 0x00ae, 10700 },
+ { 0x00aa, 10800 }, { 0x00a7, 10900 }, { 0x00a3, 11000 },
+ { 0x009f, 11100 }, { 0x009c, 11200 }, { 0x0098, 11300 },
+ { 0x0094, 11400 }, { 0x0091, 11500 }, { 0x008e, 11600 },
+ { 0x008a, 11700 }, { 0x0087, 11800 }, { 0x0084, 11900 },
+ { 0x0081, 12000 }, { 0x007e, 12100 }, { 0x007b, 12200 },
+ { 0x0079, 12300 }, { 0x0076, 12400 }, { 0x0073, 12500 },
+ { 0x0071, 12600 }, { 0x006e, 12700 }, { 0x006c, 12800 },
+ { 0x0069, 12900 }, { 0x0067, 13000 }, { 0x0065, 13100 },
+ { 0x0062, 13200 }, { 0x0060, 13300 }, { 0x005e, 13400 },
+ { 0x005c, 13500 }, { 0x005a, 13600 }, { 0x0058, 13700 },
+ { 0x0056, 13800 }, { 0x0054, 13900 }, { 0x0052, 14000 },
+ { 0x0050, 14100 }, { 0x004e, 14200 }, { 0x004c, 14300 },
+ { 0x004b, 14400 }, { 0x0049, 14500 }, { 0x0047, 14600 },
+ { 0x0046, 14700 }, { 0x0044, 14800 }, { 0x0043, 14900 },
+ { 0x0041, 15000 }, { 0x003f, 15100 }, { 0x003e, 15200 },
+ { 0x003c, 15300 }, { 0x003b, 15400 }, { 0x003a, 15500 },
+ { 0x0037, 15700 }, { 0x0036, 15800 }, { 0x0034, 15900 },
+ { 0x0033, 16000 }, { 0x0032, 16100 }, { 0x0031, 16200 },
+ { 0x0030, 16300 }, { 0x002f, 16400 }, { 0x002e, 16500 },
+ { 0x002d, 16600 }, { 0x002c, 16700 }, { 0x002b, 16800 },
+ { 0x002a, 16900 }, { 0x0029, 17000 }, { 0x0028, 17100 },
+ { 0x0027, 17200 }, { 0x0026, 17300 }, { 0x0025, 17400 },
+ { 0x0024, 17500 }, { 0x0023, 17600 }, { 0x0022, 17800 },
+ { 0x0021, 17900 }, { 0x0020, 18000 }, { 0x001f, 18200 },
+ { 0x001e, 18300 }, { 0x001d, 18500 }, { 0x001c, 18700 },
+ { 0x001b, 18900 }, { 0x001a, 19000 }, { 0x0019, 19200 },
+ { 0x0018, 19300 }, { 0x0017, 19500 }, { 0x0016, 19700 },
+ { 0x0015, 19900 }, { 0x0014, 20000 },
+};
+
+static const struct cxd2841er_cnr_data s2_cn_data[] = {
+ { 0x05af, 0 }, { 0x0597, 100 }, { 0x057e, 200 },
+ { 0x0567, 300 }, { 0x0550, 400 }, { 0x0539, 500 },
+ { 0x0522, 600 }, { 0x050c, 700 }, { 0x04f6, 800 },
+ { 0x04e1, 900 }, { 0x04cc, 1000 }, { 0x04b6, 1100 },
+ { 0x04a1, 1200 }, { 0x048c, 1300 }, { 0x0477, 1400 },
+ { 0x0463, 1500 }, { 0x044f, 1600 }, { 0x043c, 1700 },
+ { 0x0428, 1800 }, { 0x0416, 1900 }, { 0x0403, 2000 },
+ { 0x03ef, 2100 }, { 0x03dc, 2200 }, { 0x03c9, 2300 },
+ { 0x03b6, 2400 }, { 0x03a4, 2500 }, { 0x0392, 2600 },
+ { 0x0381, 2700 }, { 0x036f, 2800 }, { 0x035f, 2900 },
+ { 0x034e, 3000 }, { 0x033d, 3100 }, { 0x032d, 3200 },
+ { 0x031d, 3300 }, { 0x030d, 3400 }, { 0x02fd, 3500 },
+ { 0x02ee, 3600 }, { 0x02df, 3700 }, { 0x02d0, 3800 },
+ { 0x02c2, 3900 }, { 0x02b4, 4000 }, { 0x02a6, 4100 },
+ { 0x0299, 4200 }, { 0x028c, 4300 }, { 0x027f, 4400 },
+ { 0x0272, 4500 }, { 0x0265, 4600 }, { 0x0259, 4700 },
+ { 0x024d, 4800 }, { 0x0241, 4900 }, { 0x0236, 5000 },
+ { 0x022b, 5100 }, { 0x0220, 5200 }, { 0x0215, 5300 },
+ { 0x020a, 5400 }, { 0x0200, 5500 }, { 0x01f6, 5600 },
+ { 0x01ec, 5700 }, { 0x01e2, 5800 }, { 0x01d8, 5900 },
+ { 0x01cf, 6000 }, { 0x01c6, 6100 }, { 0x01bc, 6200 },
+ { 0x01b3, 6300 }, { 0x01aa, 6400 }, { 0x01a2, 6500 },
+ { 0x0199, 6600 }, { 0x0191, 6700 }, { 0x0189, 6800 },
+ { 0x0181, 6900 }, { 0x0179, 7000 }, { 0x0171, 7100 },
+ { 0x0169, 7200 }, { 0x0161, 7300 }, { 0x015a, 7400 },
+ { 0x0153, 7500 }, { 0x014b, 7600 }, { 0x0144, 7700 },
+ { 0x013d, 7800 }, { 0x0137, 7900 }, { 0x0130, 8000 },
+ { 0x012a, 8100 }, { 0x0124, 8200 }, { 0x011e, 8300 },
+ { 0x0118, 8400 }, { 0x0112, 8500 }, { 0x010c, 8600 },
+ { 0x0107, 8700 }, { 0x0101, 8800 }, { 0x00fc, 8900 },
+ { 0x00f7, 9000 }, { 0x00f2, 9100 }, { 0x00ec, 9200 },
+ { 0x00e7, 9300 }, { 0x00e2, 9400 }, { 0x00dd, 9500 },
+ { 0x00d8, 9600 }, { 0x00d4, 9700 }, { 0x00cf, 9800 },
+ { 0x00ca, 9900 }, { 0x00c6, 10000 }, { 0x00c2, 10100 },
+ { 0x00be, 10200 }, { 0x00b9, 10300 }, { 0x00b5, 10400 },
+ { 0x00b1, 10500 }, { 0x00ae, 10600 }, { 0x00aa, 10700 },
+ { 0x00a6, 10800 }, { 0x00a3, 10900 }, { 0x009f, 11000 },
+ { 0x009b, 11100 }, { 0x0098, 11200 }, { 0x0095, 11300 },
+ { 0x0091, 11400 }, { 0x008e, 11500 }, { 0x008b, 11600 },
+ { 0x0088, 11700 }, { 0x0085, 11800 }, { 0x0082, 11900 },
+ { 0x007f, 12000 }, { 0x007c, 12100 }, { 0x007a, 12200 },
+ { 0x0077, 12300 }, { 0x0074, 12400 }, { 0x0072, 12500 },
+ { 0x006f, 12600 }, { 0x006d, 12700 }, { 0x006b, 12800 },
+ { 0x0068, 12900 }, { 0x0066, 13000 }, { 0x0064, 13100 },
+ { 0x0061, 13200 }, { 0x005f, 13300 }, { 0x005d, 13400 },
+ { 0x005b, 13500 }, { 0x0059, 13600 }, { 0x0057, 13700 },
+ { 0x0055, 13800 }, { 0x0053, 13900 }, { 0x0051, 14000 },
+ { 0x004f, 14100 }, { 0x004e, 14200 }, { 0x004c, 14300 },
+ { 0x004a, 14400 }, { 0x0049, 14500 }, { 0x0047, 14600 },
+ { 0x0045, 14700 }, { 0x0044, 14800 }, { 0x0042, 14900 },
+ { 0x0041, 15000 }, { 0x003f, 15100 }, { 0x003e, 15200 },
+ { 0x003c, 15300 }, { 0x003b, 15400 }, { 0x003a, 15500 },
+ { 0x0038, 15600 }, { 0x0037, 15700 }, { 0x0036, 15800 },
+ { 0x0034, 15900 }, { 0x0033, 16000 }, { 0x0032, 16100 },
+ { 0x0031, 16200 }, { 0x0030, 16300 }, { 0x002f, 16400 },
+ { 0x002e, 16500 }, { 0x002d, 16600 }, { 0x002c, 16700 },
+ { 0x002b, 16800 }, { 0x002a, 16900 }, { 0x0029, 17000 },
+ { 0x0028, 17100 }, { 0x0027, 17200 }, { 0x0026, 17300 },
+ { 0x0025, 17400 }, { 0x0024, 17500 }, { 0x0023, 17600 },
+ { 0x0022, 17800 }, { 0x0021, 17900 }, { 0x0020, 18000 },
+ { 0x001f, 18200 }, { 0x001e, 18300 }, { 0x001d, 18500 },
+ { 0x001c, 18700 }, { 0x001b, 18900 }, { 0x001a, 19000 },
+ { 0x0019, 19200 }, { 0x0018, 19300 }, { 0x0017, 19500 },
+ { 0x0016, 19700 }, { 0x0015, 19900 }, { 0x0014, 20000 },
+};
+
+#define MAKE_IFFREQ_CONFIG(iffreq) ((u32)(((iffreq)/41.0)*16777216.0 + 0.5))
+
+static void cxd2841er_i2c_debug(struct cxd2841er_priv *priv,
+ u8 addr, u8 reg, u8 write,
+ const u8 *data, u32 len)
+{
+ dev_dbg(&priv->i2c->dev,
+ "cxd2841er: I2C %s addr %02x reg 0x%02x size %d\n",
+ (write == 0 ? "read" : "write"), addr, reg, len);
+ print_hex_dump_bytes("cxd2841er: I2C data: ",
+ DUMP_PREFIX_OFFSET, data, len);
+}
+
+static int cxd2841er_write_regs(struct cxd2841er_priv *priv,
+ u8 addr, u8 reg, const u8 *data, u32 len)
+{
+ int ret;
+ u8 buf[MAX_WRITE_REGSIZE + 1];
+ u8 i2c_addr = (addr == I2C_SLVX ?
+ priv->i2c_addr_slvx : priv->i2c_addr_slvt);
+ struct i2c_msg msg[1] = {
+ {
+ .addr = i2c_addr,
+ .flags = 0,
+ .len = len + 1,
+ .buf = buf,
+ }
+ };
+
+ if (len + 1 >= sizeof(buf)) {
+ dev_warn(&priv->i2c->dev,"wr reg=%04x: len=%d is too big!\n",
+ reg, len + 1);
+ return -E2BIG;
+ }
+
+ cxd2841er_i2c_debug(priv, i2c_addr, reg, 1, data, len);
+ buf[0] = reg;
+ memcpy(&buf[1], data, len);
+
+ ret = i2c_transfer(priv->i2c, msg, 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EIO;
+ if (ret < 0) {
+ dev_warn(&priv->i2c->dev,
+ "%s: i2c wr failed=%d addr=%02x reg=%02x len=%d\n",
+ KBUILD_MODNAME, ret, i2c_addr, reg, len);
+ return ret;
+ }
+ return 0;
+}
+
+static int cxd2841er_write_reg(struct cxd2841er_priv *priv,
+ u8 addr, u8 reg, u8 val)
+{
+ return cxd2841er_write_regs(priv, addr, reg, &val, 1);
+}
+
+static int cxd2841er_read_regs(struct cxd2841er_priv *priv,
+ u8 addr, u8 reg, u8 *val, u32 len)
+{
+ int ret;
+ u8 i2c_addr = (addr == I2C_SLVX ?
+ priv->i2c_addr_slvx : priv->i2c_addr_slvt);
+ struct i2c_msg msg[2] = {
+ {
+ .addr = i2c_addr,
+ .flags = 0,
+ .len = 1,
+ .buf = &reg,
+ }, {
+ .addr = i2c_addr,
+ .flags = I2C_M_RD,
+ .len = len,
+ .buf = val,
+ }
+ };
+
+ ret = i2c_transfer(priv->i2c, &msg[0], 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EIO;
+ if (ret < 0) {
+ dev_warn(&priv->i2c->dev,
+ "%s: i2c rw failed=%d addr=%02x reg=%02x\n",
+ KBUILD_MODNAME, ret, i2c_addr, reg);
+ return ret;
+ }
+ ret = i2c_transfer(priv->i2c, &msg[1], 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EIO;
+ if (ret < 0) {
+ dev_warn(&priv->i2c->dev,
+ "%s: i2c rd failed=%d addr=%02x reg=%02x\n",
+ KBUILD_MODNAME, ret, i2c_addr, reg);
+ return ret;
+ }
+ return 0;
+}
+
+static int cxd2841er_read_reg(struct cxd2841er_priv *priv,
+ u8 addr, u8 reg, u8 *val)
+{
+ return cxd2841er_read_regs(priv, addr, reg, val, 1);
+}
+
+static int cxd2841er_set_reg_bits(struct cxd2841er_priv *priv,
+ u8 addr, u8 reg, u8 data, u8 mask)
+{
+ int res;
+ u8 rdata;
+
+ if (mask != 0xff) {
+ res = cxd2841er_read_reg(priv, addr, reg, &rdata);
+ if (res)
+ return res;
+ data = ((data & mask) | (rdata & (mask ^ 0xFF)));
+ }
+ return cxd2841er_write_reg(priv, addr, reg, data);
+}
+
+static int cxd2841er_dvbs2_set_symbol_rate(struct cxd2841er_priv *priv,
+ u32 symbol_rate)
+{
+ u32 reg_value = 0;
+ u8 data[3] = {0, 0, 0};
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ /*
+ * regValue = (symbolRateKSps * 2^14 / 1000) + 0.5
+ * = ((symbolRateKSps * 2^14) + 500) / 1000
+ * = ((symbolRateKSps * 16384) + 500) / 1000
+ */
+ reg_value = DIV_ROUND_CLOSEST(symbol_rate * 16384, 1000);
+ if ((reg_value == 0) || (reg_value > 0xFFFFF)) {
+ dev_err(&priv->i2c->dev,
+ "%s(): reg_value is out of range\n", __func__);
+ return -EINVAL;
+ }
+ data[0] = (u8)((reg_value >> 16) & 0x0F);
+ data[1] = (u8)((reg_value >> 8) & 0xFF);
+ data[2] = (u8)(reg_value & 0xFF);
+ /* Set SLV-T Bank : 0xAE */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xae);
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x20, data, 3);
+ return 0;
+}
+
+static void cxd2841er_set_ts_clock_mode(struct cxd2841er_priv *priv,
+ u8 system);
+
+static int cxd2841er_sleep_s_to_active_s(struct cxd2841er_priv *priv,
+ u8 system, u32 symbol_rate)
+{
+ int ret;
+ u8 data[4] = { 0, 0, 0, 0 };
+
+ if (priv->state != STATE_SLEEP_S) {
+ dev_err(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, (int)priv->state);
+ return -EINVAL;
+ }
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_set_ts_clock_mode(priv, SYS_DVBS);
+ /* Set demod mode */
+ if (system == SYS_DVBS) {
+ data[0] = 0x0A;
+ } else if (system == SYS_DVBS2) {
+ data[0] = 0x0B;
+ } else {
+ dev_err(&priv->i2c->dev, "%s(): invalid delsys %d\n",
+ __func__, system);
+ return -EINVAL;
+ }
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x17, data[0]);
+ /* DVB-S/S2 */
+ data[0] = 0x00;
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Enable S/S2 auto detection 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2d, data[0]);
+ /* Set SLV-T Bank : 0xAE */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xae);
+ /* Enable S/S2 auto detection 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, data[0]);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Enable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x01);
+ /* Enable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x31, 0x01);
+ /* Enable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x63, 0x16);
+ /* Enable ADC 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x65, 0x3f);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Enable ADC 3 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x00);
+ /* Set SLV-T Bank : 0xA3 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa3);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xac, 0x00);
+ data[0] = 0x07;
+ data[1] = 0x3B;
+ data[2] = 0x08;
+ data[3] = 0xC5;
+ /* Set SLV-T Bank : 0xAB */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xab);
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x98, data, 4);
+ data[0] = 0x05;
+ data[1] = 0x80;
+ data[2] = 0x0A;
+ data[3] = 0x80;
+ cxd2841er_write_regs(priv, I2C_SLVT, 0xa8, data, 4);
+ data[0] = 0x0C;
+ data[1] = 0xCC;
+ cxd2841er_write_regs(priv, I2C_SLVT, 0xc3, data, 2);
+ /* Set demod parameter */
+ ret = cxd2841er_dvbs2_set_symbol_rate(priv, symbol_rate);
+ if (ret != 0)
+ return ret;
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable Hi-Z setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x10);
+ /* disable Hi-Z setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0x00);
+ priv->state = STATE_ACTIVE_S;
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_active_t_band(struct cxd2841er_priv *priv,
+ u32 bandwidth);
+
+static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
+ u32 bandwidth);
+
+static int cxd2841er_sleep_tc_to_active_c_band(struct cxd2841er_priv *priv,
+ u32 bandwidth);
+
+static int cxd2841er_retune_active(struct cxd2841er_priv *priv,
+ struct dtv_frontend_properties *p)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_S &&
+ priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable TS output */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xc3, 0x01);
+ if (priv->state == STATE_ACTIVE_S)
+ return cxd2841er_dvbs2_set_symbol_rate(
+ priv, p->symbol_rate / 1000);
+ else if (priv->state == STATE_ACTIVE_TC) {
+ switch (priv->system) {
+ case SYS_DVBT:
+ return cxd2841er_sleep_tc_to_active_t_band(
+ priv, p->bandwidth_hz);
+ case SYS_DVBT2:
+ return cxd2841er_sleep_tc_to_active_t2_band(
+ priv, p->bandwidth_hz);
+ case SYS_DVBC_ANNEX_A:
+ return cxd2841er_sleep_tc_to_active_c_band(
+ priv, 8000000);
+ }
+ }
+ dev_dbg(&priv->i2c->dev, "%s(): invalid delivery system %d\n",
+ __func__, priv->system);
+ return -EINVAL;
+}
+
+static int cxd2841er_active_s_to_sleep_s(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_S) {
+ dev_err(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable TS output */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xc3, 0x01);
+ /* enable Hi-Z setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x1f);
+ /* enable Hi-Z setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0xff);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* disable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x01);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x31, 0x00);
+ /* disable ADC 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x63, 0x16);
+ /* disable ADC 3 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x65, 0x27);
+ /* SADC Bias ON */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x69, 0x06);
+ /* disable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x00);
+ /* Set SLV-T Bank : 0xAE */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xae);
+ /* disable S/S2 auto detection1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, 0x00);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable S/S2 auto detection2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2d, 0x00);
+ priv->state = STATE_SLEEP_S;
+ return 0;
+}
+
+static int cxd2841er_sleep_s_to_shutdown(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_SLEEP_S) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid demod state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Disable DSQOUT */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x3f);
+ /* Disable DSQIN */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x9c, 0x00);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Disable oscillator */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x15, 0x01);
+ /* Set demod mode */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x17, 0x01);
+ priv->state = STATE_SHUTDOWN;
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_shutdown(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_SLEEP_TC) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid demod state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Disable oscillator */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x15, 0x01);
+ /* Set demod mode */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x17, 0x01);
+ priv->state = STATE_SHUTDOWN;
+ return 0;
+}
+
+static int cxd2841er_active_t_to_sleep_tc(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_err(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable TS output */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xc3, 0x01);
+ /* enable Hi-Z setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x3f);
+ /* enable Hi-Z setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0xff);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* disable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x01);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Disable ADC 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x43, 0x0a);
+ /* Disable ADC 3 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x0a);
+ /* Disable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, 0x00);
+ /* Disable RF level monitor */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2f, 0x00);
+ /* Disable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x00);
+ priv->state = STATE_SLEEP_TC;
+ return 0;
+}
+
+static int cxd2841er_active_t2_to_sleep_tc(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_err(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable TS output */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xc3, 0x01);
+ /* enable Hi-Z setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x3f);
+ /* enable Hi-Z setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0xff);
+ /* Cancel DVB-T2 setting */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x13);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x83, 0x40);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x86, 0x21);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x9e, 0x09, 0x0f);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x9f, 0xfb);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x2a);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x38, 0x00, 0x0f);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x2b);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x11, 0x00, 0x3f);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* disable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x01);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Disable ADC 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x43, 0x0a);
+ /* Disable ADC 3 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x0a);
+ /* Disable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, 0x00);
+ /* Disable RF level monitor */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2f, 0x00);
+ /* Disable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x00);
+ priv->state = STATE_SLEEP_TC;
+ return 0;
+}
+
+static int cxd2841er_active_c_to_sleep_tc(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_err(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* disable TS output */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xc3, 0x01);
+ /* enable Hi-Z setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x3f);
+ /* enable Hi-Z setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0xff);
+ /* Cancel DVB-C setting */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x11);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xa3, 0x00, 0x1f);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* disable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x01);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Disable ADC 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x43, 0x0a);
+ /* Disable ADC 3 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x0a);
+ /* Disable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, 0x00);
+ /* Disable RF level monitor */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2f, 0x00);
+ /* Disable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x00);
+ priv->state = STATE_SLEEP_TC;
+ return 0;
+}
+
+static int cxd2841er_shutdown_to_sleep_s(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_SHUTDOWN) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid demod state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Clear all demodulator registers */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x02, 0x00);
+ usleep_range(3000, 5000);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Set demod SW reset */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x10, 0x01);
+ /* Set X'tal clock to 20.5Mhz */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x14, 0x00);
+ /* Set demod mode */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x17, 0x0a);
+ /* Clear demod SW reset */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x10, 0x00);
+ usleep_range(1000, 2000);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* enable DSQOUT */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x1F);
+ /* enable DSQIN */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x9C, 0x40);
+ /* TADC Bias On */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x43, 0x0a);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x0a);
+ /* SADC Bias On */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x63, 0x16);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x65, 0x27);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x69, 0x06);
+ priv->state = STATE_SLEEP_S;
+ return 0;
+}
+
+static int cxd2841er_shutdown_to_sleep_tc(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_SHUTDOWN) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid demod state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Clear all demodulator registers */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x02, 0x00);
+ usleep_range(3000, 5000);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Set demod SW reset */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x10, 0x01);
+ /* Set X'tal clock to 20.5Mhz */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x13, 0x00);
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x14, 0x00);
+ /* Clear demod SW reset */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x10, 0x00);
+ usleep_range(1000, 2000);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* TADC Bias On */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x43, 0x0a);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x0a);
+ /* SADC Bias On */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x63, 0x16);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x65, 0x27);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x69, 0x06);
+ priv->state = STATE_SLEEP_TC;
+ return 0;
+}
+
+static int cxd2841er_tune_done(struct cxd2841er_priv *priv)
+{
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0, 0);
+ /* SW Reset */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xfe, 0x01);
+ /* Enable TS output */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xc3, 0x00);
+ return 0;
+}
+
+/* Set TS parallel mode */
+static void cxd2841er_set_ts_clock_mode(struct cxd2841er_priv *priv,
+ u8 system)
+{
+ u8 serial_ts, ts_rate_ctrl_off, ts_in_off;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0xc4, &serial_ts);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0xd3, &ts_rate_ctrl_off);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0xde, &ts_in_off);
+ dev_dbg(&priv->i2c->dev, "%s(): ser_ts=0x%02x rate_ctrl_off=0x%02x in_off=0x%02x\n",
+ __func__, serial_ts, ts_rate_ctrl_off, ts_in_off);
+
+ /*
+ * slave Bank Addr Bit default Name
+ * <SLV-T> 00h D9h [7:0] 8'h08 OTSCKPERIOD
+ */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xd9, 0x08);
+ /*
+ * Disable TS IF Clock
+ * slave Bank Addr Bit default Name
+ * <SLV-T> 00h 32h [0] 1'b1 OREG_CK_TSIF_EN
+ */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x32, 0x00, 0x01);
+ /*
+ * slave Bank Addr Bit default Name
+ * <SLV-T> 00h 33h [1:0] 2'b01 OREG_CKSEL_TSIF
+ */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x33, 0x00, 0x03);
+ /*
+ * Enable TS IF Clock
+ * slave Bank Addr Bit default Name
+ * <SLV-T> 00h 32h [0] 1'b1 OREG_CK_TSIF_EN
+ */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x32, 0x01, 0x01);
+
+ if (system == SYS_DVBT) {
+ /* Enable parity period for DVB-T */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x66, 0x01, 0x01);
+ } else if (system == SYS_DVBC_ANNEX_A) {
+ /* Enable parity period for DVB-C */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x40);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x66, 0x01, 0x01);
+ }
+}
+
+static u8 cxd2841er_chip_id(struct cxd2841er_priv *priv)
+{
+ u8 chip_id;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0, 0);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0xfd, &chip_id);
+ return chip_id;
+}
+
+static int cxd2841er_read_status_s(struct dvb_frontend *fe,
+ enum fe_status *status)
+{
+ u8 reg = 0;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ *status = 0;
+ if (priv->state != STATE_ACTIVE_S) {
+ dev_err(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0xA0 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa0);
+ /*
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> A0h 11h [2] ITSLOCK
+ */
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x11, &reg);
+ if (reg & 0x04) {
+ *status = FE_HAS_SIGNAL
+ | FE_HAS_CARRIER
+ | FE_HAS_VITERBI
+ | FE_HAS_SYNC
+ | FE_HAS_LOCK;
+ }
+ dev_dbg(&priv->i2c->dev, "%s(): result 0x%x\n", __func__, *status);
+ return 0;
+}
+
+static int cxd2841er_read_status_t_t2(struct cxd2841er_priv *priv,
+ u8 *sync, u8 *tslock, u8 *unlock)
+{
+ u8 data = 0;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_TC)
+ return -EINVAL;
+ if (priv->system == SYS_DVBT) {
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ } else {
+ /* Set SLV-T Bank : 0x20 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x20);
+ }
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x10, &data);
+ if ((data & 0x07) == 0x07) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid hardware state detected\n", __func__);
+ *sync = 0;
+ *tslock = 0;
+ *unlock = 0;
+ } else {
+ *sync = ((data & 0x07) == 0x6 ? 1 : 0);
+ *tslock = ((data & 0x20) ? 1 : 0);
+ *unlock = ((data & 0x10) ? 1 : 0);
+ }
+ return 0;
+}
+
+static int cxd2841er_read_status_c(struct cxd2841er_priv *priv, u8 *tslock)
+{
+ u8 data;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_TC)
+ return -EINVAL;
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x40);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x88, &data);
+ if ((data & 0x01) == 0) {
+ *tslock = 0;
+ } else {
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x10, &data);
+ *tslock = ((data & 0x20) ? 1 : 0);
+ }
+ return 0;
+}
+
+static int cxd2841er_read_status_tc(struct dvb_frontend *fe,
+ enum fe_status *status)
+{
+ int ret = 0;
+ u8 sync = 0;
+ u8 tslock = 0;
+ u8 unlock = 0;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ *status = 0;
+ if (priv->state == STATE_ACTIVE_TC) {
+ if (priv->system == SYS_DVBT || priv->system == SYS_DVBT2) {
+ ret = cxd2841er_read_status_t_t2(
+ priv, &sync, &tslock, &unlock);
+ if (ret)
+ goto done;
+ if (unlock)
+ goto done;
+ if (sync)
+ *status = FE_HAS_SIGNAL |
+ FE_HAS_CARRIER |
+ FE_HAS_VITERBI |
+ FE_HAS_SYNC;
+ if (tslock)
+ *status |= FE_HAS_LOCK;
+ } else if (priv->system == SYS_DVBC_ANNEX_A) {
+ ret = cxd2841er_read_status_c(priv, &tslock);
+ if (ret)
+ goto done;
+ if (tslock)
+ *status = FE_HAS_SIGNAL |
+ FE_HAS_CARRIER |
+ FE_HAS_VITERBI |
+ FE_HAS_SYNC |
+ FE_HAS_LOCK;
+ }
+ }
+done:
+ dev_dbg(&priv->i2c->dev, "%s(): status 0x%x\n", __func__, *status);
+ return ret;
+}
+
+static int cxd2841er_get_carrier_offset_s_s2(struct cxd2841er_priv *priv,
+ int *offset)
+{
+ u8 data[3];
+ u8 is_hs_mode;
+ s32 cfrl_ctrlval;
+ s32 temp_div, temp_q, temp_r;
+
+ if (priv->state != STATE_ACTIVE_S) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ /*
+ * Get High Sampling Rate mode
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> A0h 10h [0] ITRL_LOCK
+ */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa0);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x10, &data[0]);
+ if (data[0] & 0x01) {
+ /*
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> A0h 50h [4] IHSMODE
+ */
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x50, &data[0]);
+ is_hs_mode = (data[0] & 0x10 ? 1 : 0);
+ } else {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): unable to detect sampling rate mode\n",
+ __func__);
+ return -EINVAL;
+ }
+ /*
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> A0h 45h [4:0] ICFRL_CTRLVAL[20:16]
+ * <SLV-T> A0h 46h [7:0] ICFRL_CTRLVAL[15:8]
+ * <SLV-T> A0h 47h [7:0] ICFRL_CTRLVAL[7:0]
+ */
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x45, data, 3);
+ cfrl_ctrlval = sign_extend32((((u32)data[0] & 0x1F) << 16) |
+ (((u32)data[1] & 0xFF) << 8) |
+ ((u32)data[2] & 0xFF), 20);
+ temp_div = (is_hs_mode ? 1048576 : 1572864);
+ if (cfrl_ctrlval > 0) {
+ temp_q = div_s64_rem(97375LL * cfrl_ctrlval,
+ temp_div, &temp_r);
+ } else {
+ temp_q = div_s64_rem(-97375LL * cfrl_ctrlval,
+ temp_div, &temp_r);
+ }
+ if (temp_r >= temp_div / 2)
+ temp_q++;
+ if (cfrl_ctrlval > 0)
+ temp_q *= -1;
+ *offset = temp_q;
+ return 0;
+}
+
+static int cxd2841er_get_carrier_offset_t2(struct cxd2841er_priv *priv,
+ u32 bandwidth, int *offset)
+{
+ u8 data[4];
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ if (priv->system != SYS_DVBT2) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid delivery system %d\n",
+ __func__, priv->system);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x20);
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x4c, data, sizeof(data));
+ *offset = -1 * sign_extend32(
+ ((u32)(data[0] & 0x0F) << 24) | ((u32)data[1] << 16) |
+ ((u32)data[2] << 8) | (u32)data[3], 27);
+ switch (bandwidth) {
+ case 1712000:
+ *offset /= 582;
+ break;
+ case 5000000:
+ case 6000000:
+ case 7000000:
+ case 8000000:
+ *offset *= (bandwidth / 1000000);
+ *offset /= 940;
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): invalid bandwidth %d\n",
+ __func__, bandwidth);
+ return -EINVAL;
+ }
+ return 0;
+}
+
+static int cxd2841er_get_carrier_offset_c(struct cxd2841er_priv *priv,
+ int *offset)
+{
+ u8 data[2];
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ if (priv->system != SYS_DVBC_ANNEX_A) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid delivery system %d\n",
+ __func__, priv->system);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x40);
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x15, data, sizeof(data));
+ *offset = div_s64(41000LL * sign_extend32((((u32)data[0] & 0x3f) << 8)
+ | (u32)data[1], 13), 16384);
+ return 0;
+}
+
+static int cxd2841er_read_packet_errors_t(
+ struct cxd2841er_priv *priv, u32 *penum)
+{
+ u8 data[3];
+
+ *penum = 0;
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ cxd2841er_read_regs(priv, I2C_SLVT, 0xea, data, sizeof(data));
+ if (data[2] & 0x01)
+ *penum = ((u32)data[0] << 8) | (u32)data[1];
+ return 0;
+}
+
+static int cxd2841er_read_packet_errors_t2(
+ struct cxd2841er_priv *priv, u32 *penum)
+{
+ u8 data[3];
+
+ *penum = 0;
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x24);
+ cxd2841er_read_regs(priv, I2C_SLVT, 0xfd, data, sizeof(data));
+ if (data[0] & 0x01)
+ *penum = ((u32)data[1] << 8) | (u32)data[2];
+ return 0;
+}
+
+static u32 cxd2841er_mon_read_ber_s(struct cxd2841er_priv *priv)
+{
+ u8 data[11];
+ u32 bit_error, bit_count;
+ u32 temp_q, temp_r;
+
+ /* Set SLV-T Bank : 0xA0 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa0);
+ /*
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> A0h 35h [0] IFVBER_VALID
+ * <SLV-T> A0h 36h [5:0] IFVBER_BITERR[21:16]
+ * <SLV-T> A0h 37h [7:0] IFVBER_BITERR[15:8]
+ * <SLV-T> A0h 38h [7:0] IFVBER_BITERR[7:0]
+ * <SLV-T> A0h 3Dh [5:0] IFVBER_BITNUM[21:16]
+ * <SLV-T> A0h 3Eh [7:0] IFVBER_BITNUM[15:8]
+ * <SLV-T> A0h 3Fh [7:0] IFVBER_BITNUM[7:0]
+ */
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x35, data, 11);
+ if (data[0] & 0x01) {
+ bit_error = ((u32)(data[1] & 0x3F) << 16) |
+ ((u32)(data[2] & 0xFF) << 8) |
+ (u32)(data[3] & 0xFF);
+ bit_count = ((u32)(data[8] & 0x3F) << 16) |
+ ((u32)(data[9] & 0xFF) << 8) |
+ (u32)(data[10] & 0xFF);
+ /*
+ * BER = bitError / bitCount
+ * = (bitError * 10^7) / bitCount
+ * = ((bitError * 625 * 125 * 128) / bitCount
+ */
+ if ((bit_count == 0) || (bit_error > bit_count)) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid bit_error %d, bit_count %d\n",
+ __func__, bit_error, bit_count);
+ return 0;
+ }
+ temp_q = div_u64_rem(10000000ULL * bit_error,
+ bit_count, &temp_r);
+ if (bit_count != 1 && temp_r >= bit_count / 2)
+ temp_q++;
+ return temp_q;
+ }
+ dev_dbg(&priv->i2c->dev, "%s(): no data available\n", __func__);
+ return 0;
+}
+
+
+static u32 cxd2841er_mon_read_ber_s2(struct cxd2841er_priv *priv)
+{
+ u8 data[5];
+ u32 bit_error, period;
+ u32 temp_q, temp_r;
+ u32 result = 0;
+
+ /* Set SLV-T Bank : 0xB2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xb2);
+ /*
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> B2h 30h [0] IFLBER_VALID
+ * <SLV-T> B2h 31h [3:0] IFLBER_BITERR[27:24]
+ * <SLV-T> B2h 32h [7:0] IFLBER_BITERR[23:16]
+ * <SLV-T> B2h 33h [7:0] IFLBER_BITERR[15:8]
+ * <SLV-T> B2h 34h [7:0] IFLBER_BITERR[7:0]
+ */
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x30, data, 5);
+ if (data[0] & 0x01) {
+ /* Bit error count */
+ bit_error = ((u32)(data[1] & 0x0F) << 24) |
+ ((u32)(data[2] & 0xFF) << 16) |
+ ((u32)(data[3] & 0xFF) << 8) |
+ (u32)(data[4] & 0xFF);
+
+ /* Set SLV-T Bank : 0xA0 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa0);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x7a, data);
+ /* Measurement period */
+ period = (u32)(1 << (data[0] & 0x0F));
+ if (period == 0) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): period is 0\n", __func__);
+ return 0;
+ }
+ if (bit_error > (period * 64800)) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid bit_err 0x%x period 0x%x\n",
+ __func__, bit_error, period);
+ return 0;
+ }
+ /*
+ * BER = bitError / (period * 64800)
+ * = (bitError * 10^7) / (period * 64800)
+ * = (bitError * 10^5) / (period * 648)
+ * = (bitError * 12500) / (period * 81)
+ * = (bitError * 10) * 1250 / (period * 81)
+ */
+ temp_q = div_u64_rem(12500ULL * bit_error,
+ period * 81, &temp_r);
+ if (temp_r >= period * 40)
+ temp_q++;
+ result = temp_q;
+ } else {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): no data available\n", __func__);
+ }
+ return result;
+}
+
+static int cxd2841er_read_ber_t2(struct cxd2841er_priv *priv, u32 *ber)
+{
+ u8 data[4];
+ u32 div, q, r;
+ u32 bit_err, period_exp, n_ldpc;
+
+ *ber = 0;
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid state %d\n", __func__, priv->state);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x20);
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x39, data, sizeof(data));
+ if (!(data[0] & 0x10)) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): no valid BER data\n", __func__);
+ return 0;
+ }
+ bit_err = ((u32)(data[0] & 0x0f) << 24) |
+ ((u32)data[1] << 16) |
+ ((u32)data[2] << 8) |
+ (u32)data[3];
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x6f, data);
+ period_exp = data[0] & 0x0f;
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x22);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x5e, data);
+ n_ldpc = ((data[0] & 0x03) == 0 ? 16200 : 64800);
+ if (bit_err > ((1U << period_exp) * n_ldpc)) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid BER value\n", __func__);
+ return -EINVAL;
+ }
+ if (period_exp >= 4) {
+ div = (1U << (period_exp - 4)) * (n_ldpc / 200);
+ q = div_u64_rem(3125ULL * bit_err, div, &r);
+ } else {
+ div = (1U << period_exp) * (n_ldpc / 200);
+ q = div_u64_rem(50000ULL * bit_err, div, &r);
+ }
+ *ber = (r >= div / 2) ? q + 1 : q;
+ return 0;
+}
+
+static int cxd2841er_read_ber_t(struct cxd2841er_priv *priv, u32 *ber)
+{
+ u8 data[2];
+ u32 div, q, r;
+ u32 bit_err, period;
+
+ *ber = 0;
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid state %d\n", __func__, priv->state);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x39, data);
+ if (!(data[0] & 0x01)) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): no valid BER data\n", __func__);
+ return 0;
+ }
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x22, data, sizeof(data));
+ bit_err = ((u32)data[0] << 8) | (u32)data[1];
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x6f, data);
+ period = ((data[0] & 0x07) == 0) ? 256 : (4096 << (data[0] & 0x07));
+ div = period / 128;
+ q = div_u64_rem(78125ULL * bit_err, div, &r);
+ *ber = (r >= div / 2) ? q + 1 : q;
+ return 0;
+}
+
+static u32 cxd2841er_dvbs_read_snr(struct cxd2841er_priv *priv, u8 delsys)
+{
+ u8 data[3];
+ u32 res = 0, value;
+ int min_index, max_index, index;
+ static const struct cxd2841er_cnr_data *cn_data;
+
+ /* Set SLV-T Bank : 0xA1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa1);
+ /*
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> A1h 10h [0] ICPM_QUICKRDY
+ * <SLV-T> A1h 11h [4:0] ICPM_QUICKCNDT[12:8]
+ * <SLV-T> A1h 12h [7:0] ICPM_QUICKCNDT[7:0]
+ */
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x10, data, 3);
+ if (data[0] & 0x01) {
+ value = ((u32)(data[1] & 0x1F) << 8) | (u32)(data[2] & 0xFF);
+ min_index = 0;
+ if (delsys == SYS_DVBS) {
+ cn_data = s_cn_data;
+ max_index = sizeof(s_cn_data) /
+ sizeof(s_cn_data[0]) - 1;
+ } else {
+ cn_data = s2_cn_data;
+ max_index = sizeof(s2_cn_data) /
+ sizeof(s2_cn_data[0]) - 1;
+ }
+ if (value >= cn_data[min_index].value) {
+ res = cn_data[min_index].cnr_x1000;
+ goto done;
+ }
+ if (value <= cn_data[max_index].value) {
+ res = cn_data[max_index].cnr_x1000;
+ goto done;
+ }
+ while ((max_index - min_index) > 1) {
+ index = (max_index + min_index) / 2;
+ if (value == cn_data[index].value) {
+ res = cn_data[index].cnr_x1000;
+ goto done;
+ } else if (value > cn_data[index].value)
+ max_index = index;
+ else
+ min_index = index;
+ if ((max_index - min_index) <= 1) {
+ if (value == cn_data[max_index].value) {
+ res = cn_data[max_index].cnr_x1000;
+ goto done;
+ } else {
+ res = cn_data[min_index].cnr_x1000;
+ goto done;
+ }
+ }
+ }
+ } else {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): no data available\n", __func__);
+ }
+done:
+ return res;
+}
+
+static int cxd2841er_read_snr_t(struct cxd2841er_priv *priv, u32 *snr)
+{
+ u32 reg;
+ u8 data[2];
+
+ *snr = 0;
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid state %d\n", __func__, priv->state);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x28, data, sizeof(data));
+ reg = ((u32)data[0] << 8) | (u32)data[1];
+ if (reg == 0) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): reg value out of range\n", __func__);
+ return 0;
+ }
+ if (reg > 4996)
+ reg = 4996;
+ *snr = 10000 * ((intlog10(reg) - intlog10(5350 - reg)) >> 24) + 28500;
+ return 0;
+}
+
+static int cxd2841er_read_snr_t2(struct cxd2841er_priv *priv, u32 *snr)
+{
+ u32 reg;
+ u8 data[2];
+
+ *snr = 0;
+ if (priv->state != STATE_ACTIVE_TC) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid state %d\n", __func__, priv->state);
+ return -EINVAL;
+ }
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x20);
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x28, data, sizeof(data));
+ reg = ((u32)data[0] << 8) | (u32)data[1];
+ if (reg == 0) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): reg value out of range\n", __func__);
+ return 0;
+ }
+ if (reg > 10876)
+ reg = 10876;
+ *snr = 10000 * ((intlog10(reg) -
+ intlog10(12600 - reg)) >> 24) + 32000;
+ return 0;
+}
+
+static u16 cxd2841er_read_agc_gain_t_t2(struct cxd2841er_priv *priv,
+ u8 delsys)
+{
+ u8 data[2];
+
+ cxd2841er_write_reg(
+ priv, I2C_SLVT, 0x00, (delsys == SYS_DVBT ? 0x10 : 0x20));
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x26, data, 2);
+ return ((((u16)data[0] & 0x0F) << 8) | (u16)(data[1] & 0xFF)) << 4;
+}
+
+static u16 cxd2841er_read_agc_gain_s(struct cxd2841er_priv *priv)
+{
+ u8 data[2];
+
+ /* Set SLV-T Bank : 0xA0 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa0);
+ /*
+ * slave Bank Addr Bit Signal name
+ * <SLV-T> A0h 1Fh [4:0] IRFAGC_GAIN[12:8]
+ * <SLV-T> A0h 20h [7:0] IRFAGC_GAIN[7:0]
+ */
+ cxd2841er_read_regs(priv, I2C_SLVT, 0x1f, data, 2);
+ return ((((u16)data[0] & 0x1F) << 8) | (u16)(data[1] & 0xFF)) << 3;
+}
+
+static int cxd2841er_read_ber(struct dvb_frontend *fe, u32 *ber)
+{
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ *ber = 0;
+ switch (p->delivery_system) {
+ case SYS_DVBS:
+ *ber = cxd2841er_mon_read_ber_s(priv);
+ break;
+ case SYS_DVBS2:
+ *ber = cxd2841er_mon_read_ber_s2(priv);
+ break;
+ case SYS_DVBT:
+ return cxd2841er_read_ber_t(priv, ber);
+ case SYS_DVBT2:
+ return cxd2841er_read_ber_t2(priv, ber);
+ default:
+ *ber = 0;
+ break;
+ }
+ return 0;
+}
+
+static int cxd2841er_read_signal_strength(struct dvb_frontend *fe,
+ u16 *strength)
+{
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ switch (p->delivery_system) {
+ case SYS_DVBT:
+ case SYS_DVBT2:
+ *strength = 65535 - cxd2841er_read_agc_gain_t_t2(
+ priv, p->delivery_system);
+ break;
+ case SYS_DVBS:
+ case SYS_DVBS2:
+ *strength = 65535 - cxd2841er_read_agc_gain_s(priv);
+ break;
+ default:
+ *strength = 0;
+ break;
+ }
+ return 0;
+}
+
+static int cxd2841er_read_snr(struct dvb_frontend *fe, u16 *snr)
+{
+ u32 tmp = 0;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ switch (p->delivery_system) {
+ case SYS_DVBT:
+ cxd2841er_read_snr_t(priv, &tmp);
+ break;
+ case SYS_DVBT2:
+ cxd2841er_read_snr_t2(priv, &tmp);
+ break;
+ case SYS_DVBS:
+ case SYS_DVBS2:
+ tmp = cxd2841er_dvbs_read_snr(priv, p->delivery_system);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): unknown delivery system %d\n",
+ __func__, p->delivery_system);
+ break;
+ }
+ *snr = tmp & 0xffff;
+ return 0;
+}
+
+static int cxd2841er_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
+{
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ switch (p->delivery_system) {
+ case SYS_DVBT:
+ cxd2841er_read_packet_errors_t(priv, ucblocks);
+ break;
+ case SYS_DVBT2:
+ cxd2841er_read_packet_errors_t2(priv, ucblocks);
+ break;
+ default:
+ *ucblocks = 0;
+ break;
+ }
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ return 0;
+}
+
+static int cxd2841er_dvbt2_set_profile(
+ struct cxd2841er_priv *priv, enum cxd2841er_dvbt2_profile_t profile)
+{
+ u8 tune_mode;
+ u8 seq_not2d_time;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ switch (profile) {
+ case DVBT2_PROFILE_BASE:
+ tune_mode = 0x01;
+ seq_not2d_time = 12;
+ break;
+ case DVBT2_PROFILE_LITE:
+ tune_mode = 0x05;
+ seq_not2d_time = 40;
+ break;
+ case DVBT2_PROFILE_ANY:
+ tune_mode = 0x00;
+ seq_not2d_time = 40;
+ break;
+ default:
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x2E */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x2e);
+ /* Set profile and tune mode */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x10, tune_mode, 0x07);
+ /* Set SLV-T Bank : 0x2B */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x2b);
+ /* Set early unlock detection time */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x9d, seq_not2d_time);
+ return 0;
+}
+
+static int cxd2841er_dvbt2_set_plp_config(struct cxd2841er_priv *priv,
+ u8 is_auto, u8 plp_id)
+{
+ if (is_auto) {
+ dev_dbg(&priv->i2c->dev,
+ "%s() using auto PLP selection\n", __func__);
+ } else {
+ dev_dbg(&priv->i2c->dev,
+ "%s() using manual PLP selection, ID %d\n",
+ __func__, plp_id);
+ }
+ /* Set SLV-T Bank : 0x23 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x23);
+ if (!is_auto) {
+ /* Manual PLP selection mode. Set the data PLP Id. */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xaf, plp_id);
+ }
+ /* Auto PLP select (Scanning mode = 0x00). Data PLP select = 0x01. */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xad, (is_auto ? 0x00 : 0x01));
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_active_t2_band(struct cxd2841er_priv *priv,
+ u32 bandwidth)
+{
+ u32 iffreq;
+ u8 b20_9f[5];
+ u8 b10_a6[14];
+ u8 b10_b6[3];
+ u8 b10_d7;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ switch (bandwidth) {
+ case 8000000:
+ /* bank 0x20, reg 0x9f */
+ b20_9f[0] = 0x11;
+ b20_9f[1] = 0xf0;
+ b20_9f[2] = 0x00;
+ b20_9f[3] = 0x00;
+ b20_9f[4] = 0x00;
+ /* bank 0x10, reg 0xa6 */
+ b10_a6[0] = 0x26;
+ b10_a6[1] = 0xaf;
+ b10_a6[2] = 0x06;
+ b10_a6[3] = 0xcd;
+ b10_a6[4] = 0x13;
+ b10_a6[5] = 0xbb;
+ b10_a6[6] = 0x28;
+ b10_a6[7] = 0xba;
+ b10_a6[8] = 0x23;
+ b10_a6[9] = 0xa9;
+ b10_a6[10] = 0x1f;
+ b10_a6[11] = 0xa8;
+ b10_a6[12] = 0x2c;
+ b10_a6[13] = 0xc8;
+ iffreq = MAKE_IFFREQ_CONFIG(4.80);
+ b10_d7 = 0x00;
+ break;
+ case 7000000:
+ /* bank 0x20, reg 0x9f */
+ b20_9f[0] = 0x14;
+ b20_9f[1] = 0x80;
+ b20_9f[2] = 0x00;
+ b20_9f[3] = 0x00;
+ b20_9f[4] = 0x00;
+ /* bank 0x10, reg 0xa6 */
+ b10_a6[0] = 0x2C;
+ b10_a6[1] = 0xBD;
+ b10_a6[2] = 0x02;
+ b10_a6[3] = 0xCF;
+ b10_a6[4] = 0x04;
+ b10_a6[5] = 0xF8;
+ b10_a6[6] = 0x23;
+ b10_a6[7] = 0xA6;
+ b10_a6[8] = 0x29;
+ b10_a6[9] = 0xB0;
+ b10_a6[10] = 0x26;
+ b10_a6[11] = 0xA9;
+ b10_a6[12] = 0x21;
+ b10_a6[13] = 0xA5;
+ iffreq = MAKE_IFFREQ_CONFIG(4.2);
+ b10_d7 = 0x02;
+ break;
+ case 6000000:
+ /* bank 0x20, reg 0x9f */
+ b20_9f[0] = 0x17;
+ b20_9f[1] = 0xEA;
+ b20_9f[2] = 0xAA;
+ b20_9f[3] = 0xAA;
+ b20_9f[4] = 0xAA;
+ /* bank 0x10, reg 0xa6 */
+ b10_a6[0] = 0x27;
+ b10_a6[1] = 0xA7;
+ b10_a6[2] = 0x28;
+ b10_a6[3] = 0xB3;
+ b10_a6[4] = 0x02;
+ b10_a6[5] = 0xF0;
+ b10_a6[6] = 0x01;
+ b10_a6[7] = 0xE8;
+ b10_a6[8] = 0x00;
+ b10_a6[9] = 0xCF;
+ b10_a6[10] = 0x00;
+ b10_a6[11] = 0xE6;
+ b10_a6[12] = 0x23;
+ b10_a6[13] = 0xA4;
+ iffreq = MAKE_IFFREQ_CONFIG(3.6);
+ b10_d7 = 0x04;
+ break;
+ case 5000000:
+ /* bank 0x20, reg 0x9f */
+ b20_9f[0] = 0x1C;
+ b20_9f[1] = 0xB3;
+ b20_9f[2] = 0x33;
+ b20_9f[3] = 0x33;
+ b20_9f[4] = 0x33;
+ /* bank 0x10, reg 0xa6 */
+ b10_a6[0] = 0x27;
+ b10_a6[1] = 0xA7;
+ b10_a6[2] = 0x28;
+ b10_a6[3] = 0xB3;
+ b10_a6[4] = 0x02;
+ b10_a6[5] = 0xF0;
+ b10_a6[6] = 0x01;
+ b10_a6[7] = 0xE8;
+ b10_a6[8] = 0x00;
+ b10_a6[9] = 0xCF;
+ b10_a6[10] = 0x00;
+ b10_a6[11] = 0xE6;
+ b10_a6[12] = 0x23;
+ b10_a6[13] = 0xA4;
+ iffreq = MAKE_IFFREQ_CONFIG(3.6);
+ b10_d7 = 0x06;
+ break;
+ case 1712000:
+ /* bank 0x20, reg 0x9f */
+ b20_9f[0] = 0x58;
+ b20_9f[1] = 0xE2;
+ b20_9f[2] = 0xAF;
+ b20_9f[3] = 0xE0;
+ b20_9f[4] = 0xBC;
+ /* bank 0x10, reg 0xa6 */
+ b10_a6[0] = 0x25;
+ b10_a6[1] = 0xA0;
+ b10_a6[2] = 0x36;
+ b10_a6[3] = 0x8D;
+ b10_a6[4] = 0x2E;
+ b10_a6[5] = 0x94;
+ b10_a6[6] = 0x28;
+ b10_a6[7] = 0x9B;
+ b10_a6[8] = 0x32;
+ b10_a6[9] = 0x90;
+ b10_a6[10] = 0x2C;
+ b10_a6[11] = 0x9D;
+ b10_a6[12] = 0x29;
+ b10_a6[13] = 0x99;
+ iffreq = MAKE_IFFREQ_CONFIG(3.5);
+ b10_d7 = 0x03;
+ break;
+ default:
+ return -EINVAL;
+ }
+ /* Set SLV-T Bank : 0x20 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x20);
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x9f, b20_9f, sizeof(b20_9f));
+ /* Set SLV-T Bank : 0x27 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x27);
+ cxd2841er_set_reg_bits(
+ priv, I2C_SLVT, 0x7a,
+ (bandwidth == 1712000 ? 0x03 : 0x00), 0x0f);
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ /* Group delay equaliser sett. for ASCOT2E */
+ cxd2841er_write_regs(priv, I2C_SLVT, 0xa6, b10_a6, sizeof(b10_a6));
+ /* <IF freq setting> */
+ b10_b6[0] = (u8) ((iffreq >> 16) & 0xff);
+ b10_b6[1] = (u8)((iffreq >> 8) & 0xff);
+ b10_b6[2] = (u8)(iffreq & 0xff);
+ cxd2841er_write_regs(priv, I2C_SLVT, 0xb6, b10_b6, sizeof(b10_b6));
+ /* System bandwidth setting */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xd7, b10_d7, 0x07);
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_active_t_band(
+ struct cxd2841er_priv *priv, u32 bandwidth)
+{
+ u8 b13_9c[2] = { 0x01, 0x14 };
+ u8 bw8mhz_b10_9f[] = { 0x11, 0xF0, 0x00, 0x00, 0x00 };
+ u8 bw8mhz_b10_a6[] = { 0x26, 0xAF, 0x06, 0xCD, 0x13, 0xBB,
+ 0x28, 0xBA, 0x23, 0xA9, 0x1F, 0xA8, 0x2C, 0xC8 };
+ u8 bw8mhz_b10_d9[] = { 0x01, 0xE0 };
+ u8 bw8mhz_b17_38[] = { 0x01, 0x02 };
+ u8 bw7mhz_b10_9f[] = { 0x14, 0x80, 0x00, 0x00, 0x00 };
+ u8 bw7mhz_b10_a6[] = { 0x2C, 0xBD, 0x02, 0xCF, 0x04, 0xF8,
+ 0x23, 0xA6, 0x29, 0xB0, 0x26, 0xA9, 0x21, 0xA5 };
+ u8 bw7mhz_b10_d9[] = { 0x12, 0xF8 };
+ u8 bw7mhz_b17_38[] = { 0x00, 0x03 };
+ u8 bw6mhz_b10_9f[] = { 0x17, 0xEA, 0xAA, 0xAA, 0xAA };
+ u8 bw6mhz_b10_a6[] = { 0x27, 0xA7, 0x28, 0xB3, 0x02, 0xF0,
+ 0x01, 0xE8, 0x00, 0xCF, 0x00, 0xE6, 0x23, 0xA4 };
+ u8 bw6mhz_b10_d9[] = { 0x1F, 0xDC };
+ u8 bw6mhz_b17_38[] = { 0x00, 0x03 };
+ u8 bw5mhz_b10_9f[] = { 0x1C, 0xB3, 0x33, 0x33, 0x33 };
+ u8 bw5mhz_b10_a6[] = { 0x27, 0xA7, 0x28, 0xB3, 0x02, 0xF0,
+ 0x01, 0xE8, 0x00, 0xCF, 0x00, 0xE6, 0x23, 0xA4 };
+ u8 bw5mhz_b10_d9[] = { 0x26, 0x3C };
+ u8 bw5mhz_b17_38[] = { 0x00, 0x03 };
+ u8 b10_b6[3];
+ u8 d7val;
+ u32 iffreq;
+ u8 *b10_9f;
+ u8 *b10_a6;
+ u8 *b10_d9;
+ u8 *b17_38;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x13);
+ /* Echo performance optimization setting */
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x9c, b13_9c, sizeof(b13_9c));
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+
+ switch (bandwidth) {
+ case 8000000:
+ b10_9f = bw8mhz_b10_9f;
+ b10_a6 = bw8mhz_b10_a6;
+ b10_d9 = bw8mhz_b10_d9;
+ b17_38 = bw8mhz_b17_38;
+ d7val = 0;
+ iffreq = MAKE_IFFREQ_CONFIG(4.80);
+ break;
+ case 7000000:
+ b10_9f = bw7mhz_b10_9f;
+ b10_a6 = bw7mhz_b10_a6;
+ b10_d9 = bw7mhz_b10_d9;
+ b17_38 = bw7mhz_b17_38;
+ d7val = 2;
+ iffreq = MAKE_IFFREQ_CONFIG(4.20);
+ break;
+ case 6000000:
+ b10_9f = bw6mhz_b10_9f;
+ b10_a6 = bw6mhz_b10_a6;
+ b10_d9 = bw6mhz_b10_d9;
+ b17_38 = bw6mhz_b17_38;
+ d7val = 4;
+ iffreq = MAKE_IFFREQ_CONFIG(3.60);
+ break;
+ case 5000000:
+ b10_9f = bw5mhz_b10_9f;
+ b10_a6 = bw5mhz_b10_a6;
+ b10_d9 = bw5mhz_b10_d9;
+ b17_38 = bw5mhz_b17_38;
+ d7val = 6;
+ iffreq = MAKE_IFFREQ_CONFIG(3.60);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): invalid bandwidth %d\n",
+ __func__, bandwidth);
+ return -EINVAL;
+ }
+ /* <IF freq setting> */
+ b10_b6[0] = (u8) ((iffreq >> 16) & 0xff);
+ b10_b6[1] = (u8)((iffreq >> 8) & 0xff);
+ b10_b6[2] = (u8)(iffreq & 0xff);
+ cxd2841er_write_regs(
+ priv, I2C_SLVT, 0x9f, b10_9f, sizeof(bw8mhz_b10_9f));
+ cxd2841er_write_regs(
+ priv, I2C_SLVT, 0xa6, b10_a6, sizeof(bw8mhz_b10_a6));
+ cxd2841er_write_regs(priv, I2C_SLVT, 0xb6, b10_b6, sizeof(b10_b6));
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xd7, d7val, 0x7);
+ cxd2841er_write_regs(
+ priv, I2C_SLVT, 0xd9, b10_d9, sizeof(bw8mhz_b10_d9));
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x17);
+ cxd2841er_write_regs(
+ priv, I2C_SLVT, 0x38, b17_38, sizeof(bw8mhz_b17_38));
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_active_c_band(struct cxd2841er_priv *priv,
+ u32 bandwidth)
+{
+ u8 bw7_8mhz_b10_a6[] = {
+ 0x2D, 0xC7, 0x04, 0xF4, 0x07, 0xC5, 0x2A, 0xB8,
+ 0x27, 0x9E, 0x27, 0xA4, 0x29, 0xAB };
+ u8 bw6mhz_b10_a6[] = {
+ 0x27, 0xA7, 0x28, 0xB3, 0x02, 0xF0, 0x01, 0xE8,
+ 0x00, 0xCF, 0x00, 0xE6, 0x23, 0xA4 };
+ u8 b10_b6[3];
+ u32 iffreq;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ switch (bandwidth) {
+ case 8000000:
+ case 7000000:
+ cxd2841er_write_regs(
+ priv, I2C_SLVT, 0xa6,
+ bw7_8mhz_b10_a6, sizeof(bw7_8mhz_b10_a6));
+ iffreq = MAKE_IFFREQ_CONFIG(4.9);
+ break;
+ case 6000000:
+ cxd2841er_write_regs(
+ priv, I2C_SLVT, 0xa6,
+ bw6mhz_b10_a6, sizeof(bw6mhz_b10_a6));
+ iffreq = MAKE_IFFREQ_CONFIG(3.7);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): unsupported bandwidth %d\n",
+ __func__, bandwidth);
+ return -EINVAL;
+ }
+ /* <IF freq setting> */
+ b10_b6[0] = (u8) ((iffreq >> 16) & 0xff);
+ b10_b6[1] = (u8)((iffreq >> 8) & 0xff);
+ b10_b6[2] = (u8)(iffreq & 0xff);
+ cxd2841er_write_regs(priv, I2C_SLVT, 0xb6, b10_b6, sizeof(b10_b6));
+ /* Set SLV-T Bank : 0x11 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x11);
+ switch (bandwidth) {
+ case 8000000:
+ case 7000000:
+ cxd2841er_set_reg_bits(
+ priv, I2C_SLVT, 0xa3, 0x00, 0x1f);
+ break;
+ case 6000000:
+ cxd2841er_set_reg_bits(
+ priv, I2C_SLVT, 0xa3, 0x14, 0x1f);
+ break;
+ }
+ /* Set SLV-T Bank : 0x40 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x40);
+ switch (bandwidth) {
+ case 8000000:
+ cxd2841er_set_reg_bits(
+ priv, I2C_SLVT, 0x26, 0x0b, 0x0f);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x27, 0x3e);
+ break;
+ case 7000000:
+ cxd2841er_set_reg_bits(
+ priv, I2C_SLVT, 0x26, 0x09, 0x0f);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x27, 0xd6);
+ break;
+ case 6000000:
+ cxd2841er_set_reg_bits(
+ priv, I2C_SLVT, 0x26, 0x08, 0x0f);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x27, 0x6e);
+ break;
+ }
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_active_t(struct cxd2841er_priv *priv,
+ u32 bandwidth)
+{
+ u8 data[2] = { 0x09, 0x54 };
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_set_ts_clock_mode(priv, SYS_DVBT);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Set demod mode */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x17, 0x01);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Enable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x01);
+ /* Disable RF level monitor */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2f, 0x00);
+ /* Enable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, 0x00);
+ /* Enable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x1a);
+ /* xtal freq 20.5MHz */
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x43, data, 2);
+ /* Enable ADC 4 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x00);
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ /* IFAGC gain settings */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xd2, 0x0c, 0x1f);
+ /* Set SLV-T Bank : 0x11 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x11);
+ /* BBAGC TARGET level setting */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x6a, 0x50);
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ /* ASCOT setting ON */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xa5, 0x01, 0x01);
+ /* Set SLV-T Bank : 0x18 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x18);
+ /* Pre-RS BER moniter setting */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x36, 0x40, 0x07);
+ /* FEC Auto Recovery setting */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x30, 0x01, 0x01);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x31, 0x01, 0x01);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* TSIF setting */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xce, 0x01, 0x01);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xcf, 0x01, 0x01);
+ cxd2841er_sleep_tc_to_active_t_band(priv, bandwidth);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Disable HiZ Setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x28);
+ /* Disable HiZ Setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0x00);
+ priv->state = STATE_ACTIVE_TC;
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_active_t2(struct cxd2841er_priv *priv,
+ u32 bandwidth)
+{
+ u8 data[2] = { 0x09, 0x54 };
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_set_ts_clock_mode(priv, SYS_DVBT2);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Set demod mode */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x17, 0x02);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Enable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x01);
+ /* Disable RF level monitor */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2f, 0x00);
+ /* Enable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, 0x00);
+ /* Enable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x1a);
+ /* xtal freq 20.5MHz */
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x43, data, 2);
+ /* Enable ADC 4 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x00);
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ /* IFAGC gain settings */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xd2, 0x0c, 0x1f);
+ /* Set SLV-T Bank : 0x11 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x11);
+ /* BBAGC TARGET level setting */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x6a, 0x50);
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ /* ASCOT setting ON */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xa5, 0x01, 0x01);
+ /* Set SLV-T Bank : 0x20 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x20);
+ /* Acquisition optimization setting */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x8b, 0x3c);
+ /* Set SLV-T Bank : 0x2b */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x2b);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x76, 0x20, 0x70);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* TSIF setting */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xce, 0x01, 0x01);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xcf, 0x01, 0x01);
+ /* DVB-T2 initial setting */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x13);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x83, 0x10);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x86, 0x34);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x9e, 0x09, 0x0f);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x9f, 0xd8);
+ /* Set SLV-T Bank : 0x2a */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x2a);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x38, 0x04, 0x0f);
+ /* Set SLV-T Bank : 0x2b */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x2b);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0x11, 0x20, 0x3f);
+
+ cxd2841er_sleep_tc_to_active_t2_band(priv, bandwidth);
+
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Disable HiZ Setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x28);
+ /* Disable HiZ Setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0x00);
+ priv->state = STATE_ACTIVE_TC;
+ return 0;
+}
+
+static int cxd2841er_sleep_tc_to_active_c(struct cxd2841er_priv *priv,
+ u32 bandwidth)
+{
+ u8 data[2] = { 0x09, 0x54 };
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_set_ts_clock_mode(priv, SYS_DVBC_ANNEX_A);
+ /* Set SLV-X Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x00, 0x00);
+ /* Set demod mode */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x17, 0x04);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Enable demod clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2c, 0x01);
+ /* Disable RF level monitor */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x2f, 0x00);
+ /* Enable ADC clock */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x30, 0x00);
+ /* Enable ADC 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x41, 0x1a);
+ /* xtal freq 20.5MHz */
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x43, data, 2);
+ /* Enable ADC 4 */
+ cxd2841er_write_reg(priv, I2C_SLVX, 0x18, 0x00);
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ /* IFAGC gain settings */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xd2, 0x09, 0x1f);
+ /* Set SLV-T Bank : 0x11 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x11);
+ /* BBAGC TARGET level setting */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x6a, 0x48);
+ /* Set SLV-T Bank : 0x10 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ /* ASCOT setting ON */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xa5, 0x01, 0x01);
+ /* Set SLV-T Bank : 0x40 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x40);
+ /* Demod setting */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xc3, 0x00, 0x04);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* TSIF setting */
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xce, 0x01, 0x01);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xcf, 0x01, 0x01);
+
+ cxd2841er_sleep_tc_to_active_c_band(priv, 8000000);
+ /* Set SLV-T Bank : 0x00 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ /* Disable HiZ Setting 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x80, 0x28);
+ /* Disable HiZ Setting 2 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x81, 0x00);
+ priv->state = STATE_ACTIVE_TC;
+ return 0;
+}
+
+static int cxd2841er_get_frontend(struct dvb_frontend *fe)
+{
+ enum fe_status status = 0;
+ u16 strength = 0, snr = 0;
+ u32 errors = 0, ber = 0;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state == STATE_ACTIVE_S)
+ cxd2841er_read_status_s(fe, &status);
+ else if (priv->state == STATE_ACTIVE_TC)
+ cxd2841er_read_status_tc(fe, &status);
+
+ if (status & FE_HAS_LOCK) {
+ cxd2841er_read_signal_strength(fe, &strength);
+ p->strength.len = 1;
+ p->strength.stat[0].scale = FE_SCALE_RELATIVE;
+ p->strength.stat[0].uvalue = strength;
+ cxd2841er_read_snr(fe, &snr);
+ p->cnr.len = 1;
+ p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
+ p->cnr.stat[0].svalue = snr;
+ cxd2841er_read_ucblocks(fe, &errors);
+ p->block_error.len = 1;
+ p->block_error.stat[0].scale = FE_SCALE_COUNTER;
+ p->block_error.stat[0].uvalue = errors;
+ cxd2841er_read_ber(fe, &ber);
+ p->post_bit_error.len = 1;
+ p->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
+ p->post_bit_error.stat[0].uvalue = ber;
+ } else {
+ p->strength.len = 1;
+ p->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ p->cnr.len = 1;
+ p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ p->block_error.len = 1;
+ p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ p->post_bit_error.len = 1;
+ p->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ }
+ return 0;
+}
+
+static int cxd2841er_set_frontend_s(struct dvb_frontend *fe)
+{
+ int ret = 0, i, timeout, carr_offset;
+ enum fe_status status;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ u32 symbol_rate = p->symbol_rate/1000;
+
+ dev_dbg(&priv->i2c->dev, "%s(): %s frequency=%d symbol_rate=%d\n",
+ __func__,
+ (p->delivery_system == SYS_DVBS ? "DVB-S" : "DVB-S2"),
+ p->frequency, symbol_rate);
+ switch (priv->state) {
+ case STATE_SLEEP_S:
+ ret = cxd2841er_sleep_s_to_active_s(
+ priv, p->delivery_system, symbol_rate);
+ break;
+ case STATE_ACTIVE_S:
+ ret = cxd2841er_retune_active(priv, p);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ ret = -EINVAL;
+ goto done;
+ }
+ if (ret) {
+ dev_dbg(&priv->i2c->dev, "%s(): tune failed\n", __func__);
+ goto done;
+ }
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 1);
+ if (fe->ops.tuner_ops.set_params)
+ fe->ops.tuner_ops.set_params(fe);
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 0);
+ cxd2841er_tune_done(priv);
+ timeout = ((3000000 + (symbol_rate - 1)) / symbol_rate) + 150;
+ for (i = 0; i < timeout / CXD2841ER_DVBS_POLLING_INVL; i++) {
+ usleep_range(CXD2841ER_DVBS_POLLING_INVL*1000,
+ (CXD2841ER_DVBS_POLLING_INVL + 2) * 1000);
+ cxd2841er_read_status_s(fe, &status);
+ if (status & FE_HAS_LOCK)
+ break;
+ }
+ if (status & FE_HAS_LOCK) {
+ if (cxd2841er_get_carrier_offset_s_s2(
+ priv, &carr_offset)) {
+ ret = -EINVAL;
+ goto done;
+ }
+ dev_dbg(&priv->i2c->dev, "%s(): carrier_offset=%d\n",
+ __func__, carr_offset);
+ }
+done:
+ return ret;
+}
+
+static int cxd2841er_set_frontend_tc(struct dvb_frontend *fe)
+{
+ int ret = 0, timeout;
+ enum fe_status status;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (p->delivery_system == SYS_DVBT) {
+ priv->system = SYS_DVBT;
+ switch (priv->state) {
+ case STATE_SLEEP_TC:
+ ret = cxd2841er_sleep_tc_to_active_t(
+ priv, p->bandwidth_hz);
+ break;
+ case STATE_ACTIVE_TC:
+ ret = cxd2841er_retune_active(priv, p);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ ret = -EINVAL;
+ }
+ } else if (p->delivery_system == SYS_DVBT2) {
+ priv->system = SYS_DVBT2;
+ cxd2841er_dvbt2_set_plp_config(priv,
+ (int)(p->stream_id > 255), p->stream_id);
+ cxd2841er_dvbt2_set_profile(priv, DVBT2_PROFILE_BASE);
+ switch (priv->state) {
+ case STATE_SLEEP_TC:
+ ret = cxd2841er_sleep_tc_to_active_t2(priv,
+ p->bandwidth_hz);
+ break;
+ case STATE_ACTIVE_TC:
+ ret = cxd2841er_retune_active(priv, p);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ ret = -EINVAL;
+ }
+ } else if (p->delivery_system == SYS_DVBC_ANNEX_A ||
+ p->delivery_system == SYS_DVBC_ANNEX_C) {
+ priv->system = SYS_DVBC_ANNEX_A;
+ switch (priv->state) {
+ case STATE_SLEEP_TC:
+ ret = cxd2841er_sleep_tc_to_active_c(
+ priv, p->bandwidth_hz);
+ break;
+ case STATE_ACTIVE_TC:
+ ret = cxd2841er_retune_active(priv, p);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ ret = -EINVAL;
+ }
+ } else {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid delivery system %d\n",
+ __func__, p->delivery_system);
+ ret = -EINVAL;
+ }
+ if (ret)
+ goto done;
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 1);
+ if (fe->ops.tuner_ops.set_params)
+ fe->ops.tuner_ops.set_params(fe);
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 0);
+ cxd2841er_tune_done(priv);
+ timeout = 2500;
+ while (timeout > 0) {
+ ret = cxd2841er_read_status_tc(fe, &status);
+ if (ret)
+ goto done;
+ if (status & FE_HAS_LOCK)
+ break;
+ msleep(20);
+ timeout -= 20;
+ }
+ if (timeout < 0)
+ dev_dbg(&priv->i2c->dev,
+ "%s(): LOCK wait timeout\n", __func__);
+done:
+ return ret;
+}
+
+static int cxd2841er_tune_s(struct dvb_frontend *fe,
+ bool re_tune,
+ unsigned int mode_flags,
+ unsigned int *delay,
+ enum fe_status *status)
+{
+ int ret, carrier_offset;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+
+ dev_dbg(&priv->i2c->dev, "%s() re_tune=%d\n", __func__, re_tune);
+ if (re_tune) {
+ ret = cxd2841er_set_frontend_s(fe);
+ if (ret)
+ return ret;
+ cxd2841er_read_status_s(fe, status);
+ if (*status & FE_HAS_LOCK) {
+ if (cxd2841er_get_carrier_offset_s_s2(
+ priv, &carrier_offset))
+ return -EINVAL;
+ p->frequency += carrier_offset;
+ ret = cxd2841er_set_frontend_s(fe);
+ if (ret)
+ return ret;
+ }
+ }
+ *delay = HZ / 5;
+ return cxd2841er_read_status_s(fe, status);
+}
+
+static int cxd2841er_tune_tc(struct dvb_frontend *fe,
+ bool re_tune,
+ unsigned int mode_flags,
+ unsigned int *delay,
+ enum fe_status *status)
+{
+ int ret, carrier_offset;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+
+ dev_dbg(&priv->i2c->dev, "%s(): re_tune %d\n", __func__, re_tune);
+ if (re_tune) {
+ ret = cxd2841er_set_frontend_tc(fe);
+ if (ret)
+ return ret;
+ cxd2841er_read_status_tc(fe, status);
+ if (*status & FE_HAS_LOCK) {
+ switch (priv->system) {
+ case SYS_DVBT:
+ case SYS_DVBT2:
+ ret = cxd2841er_get_carrier_offset_t2(
+ priv, p->bandwidth_hz,
+ &carrier_offset);
+ break;
+ case SYS_DVBC_ANNEX_A:
+ ret = cxd2841er_get_carrier_offset_c(
+ priv, &carrier_offset);
+ break;
+ default:
+ dev_dbg(&priv->i2c->dev,
+ "%s(): invalid delivery system %d\n",
+ __func__, priv->system);
+ return -EINVAL;
+ }
+ if (ret)
+ return ret;
+ dev_dbg(&priv->i2c->dev, "%s(): carrier offset %d\n",
+ __func__, carrier_offset);
+ p->frequency += carrier_offset;
+ ret = cxd2841er_set_frontend_tc(fe);
+ if (ret)
+ return ret;
+ }
+ }
+ *delay = HZ / 5;
+ return cxd2841er_read_status_tc(fe, status);
+}
+
+static int cxd2841er_sleep_s(struct dvb_frontend *fe)
+{
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_active_s_to_sleep_s(fe->demodulator_priv);
+ cxd2841er_sleep_s_to_shutdown(fe->demodulator_priv);
+ return 0;
+}
+
+static int cxd2841er_sleep_tc(struct dvb_frontend *fe)
+{
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state == STATE_ACTIVE_TC) {
+ switch (priv->system) {
+ case SYS_DVBT:
+ cxd2841er_active_t_to_sleep_tc(priv);
+ break;
+ case SYS_DVBT2:
+ cxd2841er_active_t2_to_sleep_tc(priv);
+ break;
+ case SYS_DVBC_ANNEX_A:
+ cxd2841er_active_c_to_sleep_tc(priv);
+ break;
+ default:
+ dev_warn(&priv->i2c->dev,
+ "%s(): unknown delivery system %d\n",
+ __func__, priv->system);
+ }
+ }
+ if (priv->state != STATE_SLEEP_TC) {
+ dev_err(&priv->i2c->dev, "%s(): invalid state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ cxd2841er_sleep_tc_to_shutdown(priv);
+ return 0;
+}
+
+static int cxd2841er_send_burst(struct dvb_frontend *fe,
+ enum fe_sec_mini_cmd burst)
+{
+ u8 data;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s(): burst mode %s\n", __func__,
+ (burst == SEC_MINI_A ? "A" : "B"));
+ if (priv->state != STATE_SLEEP_S &&
+ priv->state != STATE_ACTIVE_S) {
+ dev_err(&priv->i2c->dev, "%s(): invalid demod state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ data = (burst == SEC_MINI_A ? 0 : 1);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xbb);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x34, 0x01);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x35, data);
+ return 0;
+}
+
+static int cxd2841er_set_tone(struct dvb_frontend *fe,
+ enum fe_sec_tone_mode tone)
+{
+ u8 data;
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s(): tone %s\n", __func__,
+ (tone == SEC_TONE_ON ? "On" : "Off"));
+ if (priv->state != STATE_SLEEP_S &&
+ priv->state != STATE_ACTIVE_S) {
+ dev_err(&priv->i2c->dev, "%s(): invalid demod state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ data = (tone == SEC_TONE_ON ? 1 : 0);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xbb);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x36, data);
+ return 0;
+}
+
+static int cxd2841er_send_diseqc_msg(struct dvb_frontend *fe,
+ struct dvb_diseqc_master_cmd *cmd)
+{
+ int i;
+ u8 data[12];
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ if (priv->state != STATE_SLEEP_S &&
+ priv->state != STATE_ACTIVE_S) {
+ dev_err(&priv->i2c->dev, "%s(): invalid demod state %d\n",
+ __func__, priv->state);
+ return -EINVAL;
+ }
+ dev_dbg(&priv->i2c->dev,
+ "%s(): cmd->len %d\n", __func__, cmd->msg_len);
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xbb);
+ /* DiDEqC enable */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x33, 0x01);
+ /* cmd1 length & data */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x3d, cmd->msg_len);
+ memset(data, 0, sizeof(data));
+ for (i = 0; i < cmd->msg_len && i < sizeof(data); i++)
+ data[i] = cmd->msg[i];
+ cxd2841er_write_regs(priv, I2C_SLVT, 0x3e, data, sizeof(data));
+ /* repeat count for cmd1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x37, 1);
+ /* repeat count for cmd2: always 0 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x38, 0);
+ /* start transmit */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x32, 0x01);
+ /* wait for 1 sec timeout */
+ for (i = 0; i < 50; i++) {
+ cxd2841er_read_reg(priv, I2C_SLVT, 0x10, data);
+ if (!data[0]) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): DiSEqC cmd has been sent\n", __func__);
+ return 0;
+ }
+ msleep(20);
+ }
+ dev_dbg(&priv->i2c->dev,
+ "%s(): DiSEqC cmd transmit timeout\n", __func__);
+ return -ETIMEDOUT;
+}
+
+static void cxd2841er_release(struct dvb_frontend *fe)
+{
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ kfree(priv);
+}
+
+static int cxd2841er_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
+{
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s(): enable=%d\n", __func__, enable);
+ cxd2841er_set_reg_bits(
+ priv, I2C_SLVX, 0x8, (enable ? 0x01 : 0x00), 0x01);
+ return 0;
+}
+
+static enum dvbfe_algo cxd2841er_get_algo(struct dvb_frontend *fe)
+{
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ return DVBFE_ALGO_HW;
+}
+
+static int cxd2841er_init_s(struct dvb_frontend *fe)
+{
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_shutdown_to_sleep_s(priv);
+ /* SONY_DEMOD_CONFIG_SAT_IFAGCNEG set to 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0xa0);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xb9, 0x01, 0x01);
+ return 0;
+}
+
+static int cxd2841er_init_tc(struct dvb_frontend *fe)
+{
+ struct cxd2841er_priv *priv = fe->demodulator_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ cxd2841er_shutdown_to_sleep_tc(priv);
+ /* SONY_DEMOD_CONFIG_IFAGCNEG = 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x10);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xcb, 0x40, 0x40);
+ /* SONY_DEMOD_CONFIG_IFAGC_ADC_FS = 0 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0xcd, 0x50);
+ /* SONY_DEMOD_CONFIG_PARALLEL_SEL = 1 */
+ cxd2841er_write_reg(priv, I2C_SLVT, 0x00, 0x00);
+ cxd2841er_set_reg_bits(priv, I2C_SLVT, 0xc4, 0x00, 0x80);
+ return 0;
+}
+
+static struct dvb_frontend_ops cxd2841er_dvbs_s2_ops;
+static struct dvb_frontend_ops cxd2841er_dvbt_t2_ops;
+static struct dvb_frontend_ops cxd2841er_dvbc_ops;
+
+static struct dvb_frontend *cxd2841er_attach(struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c,
+ u8 system)
+{
+ u8 chip_id = 0;
+ const char *type;
+ struct cxd2841er_priv *priv = NULL;
+
+ /* allocate memory for the internal state */
+ priv = kzalloc(sizeof(struct cxd2841er_priv), GFP_KERNEL);
+ if (!priv)
+ return NULL;
+ priv->i2c = i2c;
+ priv->config = cfg;
+ priv->i2c_addr_slvx = (cfg->i2c_addr + 4) >> 1;
+ priv->i2c_addr_slvt = (cfg->i2c_addr) >> 1;
+ /* create dvb_frontend */
+ switch (system) {
+ case SYS_DVBS:
+ memcpy(&priv->frontend.ops,
+ &cxd2841er_dvbs_s2_ops,
+ sizeof(struct dvb_frontend_ops));
+ type = "S/S2";
+ break;
+ case SYS_DVBT:
+ memcpy(&priv->frontend.ops,
+ &cxd2841er_dvbt_t2_ops,
+ sizeof(struct dvb_frontend_ops));
+ type = "T/T2";
+ break;
+ case SYS_DVBC_ANNEX_A:
+ memcpy(&priv->frontend.ops,
+ &cxd2841er_dvbc_ops,
+ sizeof(struct dvb_frontend_ops));
+ type = "C/C2";
+ break;
+ default:
+ kfree(priv);
+ return NULL;
+ }
+ priv->frontend.demodulator_priv = priv;
+ dev_info(&priv->i2c->dev,
+ "%s(): attaching CXD2841ER DVB-%s frontend\n",
+ __func__, type);
+ dev_info(&priv->i2c->dev,
+ "%s(): I2C adapter %p SLVX addr %x SLVT addr %x\n",
+ __func__, priv->i2c,
+ priv->i2c_addr_slvx, priv->i2c_addr_slvt);
+ chip_id = cxd2841er_chip_id(priv);
+ if (chip_id != CXD2841ER_CHIP_ID) {
+ dev_err(&priv->i2c->dev, "%s(): invalid chip ID 0x%02x\n",
+ __func__, chip_id);
+ priv->frontend.demodulator_priv = NULL;
+ kfree(priv);
+ return NULL;
+ }
+ dev_info(&priv->i2c->dev, "%s(): chip ID 0x%02x OK.\n",
+ __func__, chip_id);
+ return &priv->frontend;
+}
+
+struct dvb_frontend *cxd2841er_attach_s(struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c)
+{
+ return cxd2841er_attach(cfg, i2c, SYS_DVBS);
+}
+EXPORT_SYMBOL(cxd2841er_attach_s);
+
+struct dvb_frontend *cxd2841er_attach_t(struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c)
+{
+ return cxd2841er_attach(cfg, i2c, SYS_DVBT);
+}
+EXPORT_SYMBOL(cxd2841er_attach_t);
+
+struct dvb_frontend *cxd2841er_attach_c(struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c)
+{
+ return cxd2841er_attach(cfg, i2c, SYS_DVBC_ANNEX_A);
+}
+EXPORT_SYMBOL(cxd2841er_attach_c);
+
+static struct dvb_frontend_ops cxd2841er_dvbs_s2_ops = {
+ .delsys = { SYS_DVBS, SYS_DVBS2 },
+ .info = {
+ .name = "Sony CXD2841ER DVB-S/S2 demodulator",
+ .frequency_min = 500000,
+ .frequency_max = 2500000,
+ .frequency_stepsize = 0,
+ .symbol_rate_min = 1000000,
+ .symbol_rate_max = 45000000,
+ .symbol_rate_tolerance = 500,
+ .caps = FE_CAN_INVERSION_AUTO |
+ FE_CAN_FEC_AUTO |
+ FE_CAN_QPSK,
+ },
+ .init = cxd2841er_init_s,
+ .sleep = cxd2841er_sleep_s,
+ .release = cxd2841er_release,
+ .set_frontend = cxd2841er_set_frontend_s,
+ .get_frontend = cxd2841er_get_frontend,
+ .read_status = cxd2841er_read_status_s,
+ .i2c_gate_ctrl = cxd2841er_i2c_gate_ctrl,
+ .get_frontend_algo = cxd2841er_get_algo,
+ .set_tone = cxd2841er_set_tone,
+ .diseqc_send_burst = cxd2841er_send_burst,
+ .diseqc_send_master_cmd = cxd2841er_send_diseqc_msg,
+ .tune = cxd2841er_tune_s
+};
+
+static struct dvb_frontend_ops cxd2841er_dvbt_t2_ops = {
+ .delsys = { SYS_DVBT, SYS_DVBT2 },
+ .info = {
+ .name = "Sony CXD2841ER DVB-T/T2 demodulator",
+ .caps = FE_CAN_FEC_1_2 |
+ FE_CAN_FEC_2_3 |
+ FE_CAN_FEC_3_4 |
+ FE_CAN_FEC_5_6 |
+ FE_CAN_FEC_7_8 |
+ FE_CAN_FEC_AUTO |
+ FE_CAN_QPSK |
+ FE_CAN_QAM_16 |
+ FE_CAN_QAM_32 |
+ FE_CAN_QAM_64 |
+ FE_CAN_QAM_128 |
+ FE_CAN_QAM_256 |
+ FE_CAN_QAM_AUTO |
+ FE_CAN_TRANSMISSION_MODE_AUTO |
+ FE_CAN_GUARD_INTERVAL_AUTO |
+ FE_CAN_HIERARCHY_AUTO |
+ FE_CAN_MUTE_TS |
+ FE_CAN_2G_MODULATION,
+ .frequency_min = 42000000,
+ .frequency_max = 1002000000
+ },
+ .init = cxd2841er_init_tc,
+ .sleep = cxd2841er_sleep_tc,
+ .release = cxd2841er_release,
+ .set_frontend = cxd2841er_set_frontend_tc,
+ .get_frontend = cxd2841er_get_frontend,
+ .read_status = cxd2841er_read_status_tc,
+ .tune = cxd2841er_tune_tc,
+ .i2c_gate_ctrl = cxd2841er_i2c_gate_ctrl,
+ .get_frontend_algo = cxd2841er_get_algo
+};
+
+static struct dvb_frontend_ops cxd2841er_dvbc_ops = {
+ .delsys = { SYS_DVBC_ANNEX_A },
+ .info = {
+ .name = "Sony CXD2841ER DVB-C demodulator",
+ .caps = FE_CAN_FEC_1_2 |
+ FE_CAN_FEC_2_3 |
+ FE_CAN_FEC_3_4 |
+ FE_CAN_FEC_5_6 |
+ FE_CAN_FEC_7_8 |
+ FE_CAN_FEC_AUTO |
+ FE_CAN_QAM_16 |
+ FE_CAN_QAM_32 |
+ FE_CAN_QAM_64 |
+ FE_CAN_QAM_128 |
+ FE_CAN_QAM_256 |
+ FE_CAN_QAM_AUTO |
+ FE_CAN_INVERSION_AUTO,
+ .frequency_min = 42000000,
+ .frequency_max = 1002000000
+ },
+ .init = cxd2841er_init_tc,
+ .sleep = cxd2841er_sleep_tc,
+ .release = cxd2841er_release,
+ .set_frontend = cxd2841er_set_frontend_tc,
+ .get_frontend = cxd2841er_get_frontend,
+ .read_status = cxd2841er_read_status_tc,
+ .tune = cxd2841er_tune_tc,
+ .i2c_gate_ctrl = cxd2841er_i2c_gate_ctrl,
+ .get_frontend_algo = cxd2841er_get_algo,
+};
+
+MODULE_DESCRIPTION("Sony CXD2841ER DVB-C/C2/T/T2/S/S2 demodulator driver");
+MODULE_AUTHOR("Sergey Kozlov <serjk@netup.ru>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb-frontends/cxd2841er.h b/drivers/media/dvb-frontends/cxd2841er.h
new file mode 100644
index 000000000000..3472bdd58949
--- /dev/null
+++ b/drivers/media/dvb-frontends/cxd2841er.h
@@ -0,0 +1,65 @@
+/*
+ * cxd2841er.h
+ *
+ * Sony CXD2441ER digital demodulator driver public definitions
+ *
+ * Copyright 2012 Sony Corporation
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef CXD2841ER_H
+#define CXD2841ER_H
+
+#include <linux/kconfig.h>
+#include <linux/dvb/frontend.h>
+
+struct cxd2841er_config {
+ u8 i2c_addr;
+};
+
+#if IS_REACHABLE(CONFIG_DVB_CXD2841ER)
+extern struct dvb_frontend *cxd2841er_attach_s(struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c);
+
+extern struct dvb_frontend *cxd2841er_attach_t(struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c);
+
+extern struct dvb_frontend *cxd2841er_attach_c(struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c);
+#else
+static inline struct dvb_frontend *cxd2841er_attach_s(
+ struct cxd2841er_config *cfg,
+ struct i2c_adapter *i2c)
+{
+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+ return NULL;
+}
+
+static inline struct dvb_frontend *cxd2841er_attach_t(
+ struct cxd2841er_config *cfg, struct i2c_adapter *i2c)
+{
+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+ return NULL;
+}
+
+static inline struct dvb_frontend *cxd2841er_attach_c(
+ struct cxd2841er_config *cfg, struct i2c_adapter *i2c)
+{
+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+ return NULL;
+}
+#endif
+
+#endif
diff --git a/drivers/media/dvb-frontends/cxd2841er_priv.h b/drivers/media/dvb-frontends/cxd2841er_priv.h
new file mode 100644
index 000000000000..33e2f495277b
--- /dev/null
+++ b/drivers/media/dvb-frontends/cxd2841er_priv.h
@@ -0,0 +1,43 @@
+/*
+ * cxd2841er_priv.h
+ *
+ * Sony CXD2441ER digital demodulator driver internal definitions
+ *
+ * Copyright 2012 Sony Corporation
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef CXD2841ER_PRIV_H
+#define CXD2841ER_PRIV_H
+
+#define I2C_SLVX 0
+#define I2C_SLVT 1
+
+#define CXD2841ER_CHIP_ID 0xa7
+
+#define CXD2841ER_DVBS_POLLING_INVL 10
+
+struct cxd2841er_cnr_data {
+ u32 value;
+ int cnr_x1000;
+};
+
+enum cxd2841er_dvbt2_profile_t {
+ DVBT2_PROFILE_ANY = 0,
+ DVBT2_PROFILE_BASE = 1,
+ DVBT2_PROFILE_LITE = 2
+};
+
+#endif
diff --git a/drivers/media/dvb-frontends/dvb-pll.c b/drivers/media/dvb-frontends/dvb-pll.c
index 6d8fe8843237..53089e142715 100644
--- a/drivers/media/dvb-frontends/dvb-pll.c
+++ b/drivers/media/dvb-frontends/dvb-pll.c
@@ -34,7 +34,7 @@ struct dvb_pll_priv {
struct i2c_adapter *i2c;
/* the PLL descriptor */
- struct dvb_pll_desc *pll_desc;
+ const struct dvb_pll_desc *pll_desc;
/* cached frequency/bandwidth */
u32 frequency;
@@ -57,7 +57,7 @@ MODULE_PARM_DESC(id, "force pll id to use (DEBUG ONLY)");
/* ----------------------------------------------------------- */
struct dvb_pll_desc {
- char *name;
+ const char *name;
u32 min;
u32 max;
u32 iffreq;
@@ -71,13 +71,13 @@ struct dvb_pll_desc {
u32 stepsize;
u8 config;
u8 cb;
- } entries[12];
+ } entries[];
};
/* ----------------------------------------------------------- */
/* descriptions */
-static struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
+static const struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
.name = "Thomson dtt7579",
.min = 177000000,
.max = 858000000,
@@ -99,7 +99,7 @@ static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf)
buf[3] |= 0x10;
}
-static struct dvb_pll_desc dvb_pll_thomson_dtt759x = {
+static const struct dvb_pll_desc dvb_pll_thomson_dtt759x = {
.name = "Thomson dtt759x",
.min = 177000000,
.max = 896000000,
@@ -123,7 +123,7 @@ static void thomson_dtt7520x_bw(struct dvb_frontend *fe, u8 *buf)
buf[3] ^= 0x10;
}
-static struct dvb_pll_desc dvb_pll_thomson_dtt7520x = {
+static const struct dvb_pll_desc dvb_pll_thomson_dtt7520x = {
.name = "Thomson dtt7520x",
.min = 185000000,
.max = 900000000,
@@ -141,7 +141,7 @@ static struct dvb_pll_desc dvb_pll_thomson_dtt7520x = {
},
};
-static struct dvb_pll_desc dvb_pll_lg_z201 = {
+static const struct dvb_pll_desc dvb_pll_lg_z201 = {
.name = "LG z201",
.min = 174000000,
.max = 862000000,
@@ -157,7 +157,7 @@ static struct dvb_pll_desc dvb_pll_lg_z201 = {
},
};
-static struct dvb_pll_desc dvb_pll_unknown_1 = {
+static const struct dvb_pll_desc dvb_pll_unknown_1 = {
.name = "unknown 1", /* used by dntv live dvb-t */
.min = 174000000,
.max = 862000000,
@@ -179,7 +179,7 @@ static struct dvb_pll_desc dvb_pll_unknown_1 = {
/* Infineon TUA6010XS
* used in Thomson Cable Tuner
*/
-static struct dvb_pll_desc dvb_pll_tua6010xs = {
+static const struct dvb_pll_desc dvb_pll_tua6010xs = {
.name = "Infineon TUA6010XS",
.min = 44250000,
.max = 858000000,
@@ -193,7 +193,7 @@ static struct dvb_pll_desc dvb_pll_tua6010xs = {
};
/* Panasonic env57h1xd5 (some Philips PLL ?) */
-static struct dvb_pll_desc dvb_pll_env57h1xd5 = {
+static const struct dvb_pll_desc dvb_pll_env57h1xd5 = {
.name = "Panasonic ENV57H1XD5",
.min = 44250000,
.max = 858000000,
@@ -217,7 +217,7 @@ static void tda665x_bw(struct dvb_frontend *fe, u8 *buf)
buf[3] |= 0x08;
}
-static struct dvb_pll_desc dvb_pll_tda665x = {
+static const struct dvb_pll_desc dvb_pll_tda665x = {
.name = "Philips TDA6650/TDA6651",
.min = 44250000,
.max = 858000000,
@@ -251,7 +251,7 @@ static void tua6034_bw(struct dvb_frontend *fe, u8 *buf)
buf[3] |= 0x08;
}
-static struct dvb_pll_desc dvb_pll_tua6034 = {
+static const struct dvb_pll_desc dvb_pll_tua6034 = {
.name = "Infineon TUA6034",
.min = 44250000,
.max = 858000000,
@@ -275,7 +275,7 @@ static void tded4_bw(struct dvb_frontend *fe, u8 *buf)
buf[3] |= 0x04;
}
-static struct dvb_pll_desc dvb_pll_tded4 = {
+static const struct dvb_pll_desc dvb_pll_tded4 = {
.name = "ALPS TDED4",
.min = 47000000,
.max = 863000000,
@@ -293,7 +293,7 @@ static struct dvb_pll_desc dvb_pll_tded4 = {
/* ALPS TDHU2
* used in AverTVHD MCE A180
*/
-static struct dvb_pll_desc dvb_pll_tdhu2 = {
+static const struct dvb_pll_desc dvb_pll_tdhu2 = {
.name = "ALPS TDHU2",
.min = 54000000,
.max = 864000000,
@@ -310,7 +310,7 @@ static struct dvb_pll_desc dvb_pll_tdhu2 = {
/* Samsung TBMV30111IN / TBMV30712IN1
* used in Air2PC ATSC - 2nd generation (nxt2002)
*/
-static struct dvb_pll_desc dvb_pll_samsung_tbmv = {
+static const struct dvb_pll_desc dvb_pll_samsung_tbmv = {
.name = "Samsung TBMV30111IN / TBMV30712IN1",
.min = 54000000,
.max = 860000000,
@@ -329,7 +329,7 @@ static struct dvb_pll_desc dvb_pll_samsung_tbmv = {
/*
* Philips SD1878 Tuner.
*/
-static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
+static const struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
.name = "Philips SD1878",
.min = 950000,
.max = 2150000,
@@ -395,7 +395,7 @@ static void opera1_bw(struct dvb_frontend *fe, u8 *buf)
return;
}
-static struct dvb_pll_desc dvb_pll_opera1 = {
+static const struct dvb_pll_desc dvb_pll_opera1 = {
.name = "Opera Tuner",
.min = 900000,
.max = 2250000,
@@ -442,7 +442,7 @@ static void samsung_dtos403ih102a_set(struct dvb_frontend *fe, u8 *buf)
}
/* unknown pll used in Samsung DTOS403IH102A DVB-C tuner */
-static struct dvb_pll_desc dvb_pll_samsung_dtos403ih102a = {
+static const struct dvb_pll_desc dvb_pll_samsung_dtos403ih102a = {
.name = "Samsung DTOS403IH102A",
.min = 44250000,
.max = 858000000,
@@ -462,7 +462,7 @@ static struct dvb_pll_desc dvb_pll_samsung_dtos403ih102a = {
};
/* Samsung TDTC9251DH0 DVB-T NIM, as used on AirStar 2 */
-static struct dvb_pll_desc dvb_pll_samsung_tdtc9251dh0 = {
+static const struct dvb_pll_desc dvb_pll_samsung_tdtc9251dh0 = {
.name = "Samsung TDTC9251DH0",
.min = 48000000,
.max = 863000000,
@@ -476,7 +476,7 @@ static struct dvb_pll_desc dvb_pll_samsung_tdtc9251dh0 = {
};
/* Samsung TBDU18132 DVB-S NIM with TSA5059 PLL, used in SkyStar2 DVB-S 2.3 */
-static struct dvb_pll_desc dvb_pll_samsung_tbdu18132 = {
+static const struct dvb_pll_desc dvb_pll_samsung_tbdu18132 = {
.name = "Samsung TBDU18132",
.min = 950000,
.max = 2150000, /* guesses */
@@ -497,7 +497,7 @@ static struct dvb_pll_desc dvb_pll_samsung_tbdu18132 = {
};
/* Samsung TBMU24112 DVB-S NIM with SL1935 zero-IF tuner */
-static struct dvb_pll_desc dvb_pll_samsung_tbmu24112 = {
+static const struct dvb_pll_desc dvb_pll_samsung_tbmu24112 = {
.name = "Samsung TBMU24112",
.min = 950000,
.max = 2150000, /* guesses */
@@ -518,7 +518,7 @@ static struct dvb_pll_desc dvb_pll_samsung_tbmu24112 = {
* 153 - 430 0 * 0 0 0 0 1 0 0x02
* 430 - 822 0 * 0 0 1 0 0 0 0x08
* 822 - 862 1 * 0 0 1 0 0 0 0x88 */
-static struct dvb_pll_desc dvb_pll_alps_tdee4 = {
+static const struct dvb_pll_desc dvb_pll_alps_tdee4 = {
.name = "ALPS TDEE4",
.min = 47000000,
.max = 862000000,
@@ -534,7 +534,7 @@ static struct dvb_pll_desc dvb_pll_alps_tdee4 = {
/* ----------------------------------------------------------- */
-static struct dvb_pll_desc *pll_list[] = {
+static const struct dvb_pll_desc *pll_list[] = {
[DVB_PLL_UNDEFINED] = NULL,
[DVB_PLL_THOMSON_DTT7579] = &dvb_pll_thomson_dtt7579,
[DVB_PLL_THOMSON_DTT759X] = &dvb_pll_thomson_dtt759x,
@@ -564,7 +564,7 @@ static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf,
const u32 frequency)
{
struct dvb_pll_priv *priv = fe->tuner_priv;
- struct dvb_pll_desc *desc = priv->pll_desc;
+ const struct dvb_pll_desc *desc = priv->pll_desc;
u32 div;
int i;
@@ -758,7 +758,7 @@ struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
.buf = b1, .len = 1 };
struct dvb_pll_priv *priv = NULL;
int ret;
- struct dvb_pll_desc *desc;
+ const struct dvb_pll_desc *desc;
if ((id[dvb_pll_devcount] > DVB_PLL_UNDEFINED) &&
(id[dvb_pll_devcount] < ARRAY_SIZE(pll_list)))
diff --git a/drivers/media/dvb-frontends/horus3a.c b/drivers/media/dvb-frontends/horus3a.c
new file mode 100644
index 000000000000..000606af70f7
--- /dev/null
+++ b/drivers/media/dvb-frontends/horus3a.c
@@ -0,0 +1,430 @@
+/*
+ * horus3a.h
+ *
+ * Sony Horus3A DVB-S/S2 tuner driver
+ *
+ * Copyright 2012 Sony Corporation
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/dvb/frontend.h>
+#include <linux/types.h>
+#include "horus3a.h"
+#include "dvb_frontend.h"
+
+#define MAX_WRITE_REGSIZE 5
+
+enum horus3a_state {
+ STATE_UNKNOWN,
+ STATE_SLEEP,
+ STATE_ACTIVE
+};
+
+struct horus3a_priv {
+ u32 frequency;
+ u8 i2c_address;
+ struct i2c_adapter *i2c;
+ enum horus3a_state state;
+ void *set_tuner_data;
+ int (*set_tuner)(void *, int);
+};
+
+static void horus3a_i2c_debug(struct horus3a_priv *priv,
+ u8 reg, u8 write, const u8 *data, u32 len)
+{
+ dev_dbg(&priv->i2c->dev, "horus3a: I2C %s reg 0x%02x size %d\n",
+ (write == 0 ? "read" : "write"), reg, len);
+ print_hex_dump_bytes("horus3a: I2C data: ",
+ DUMP_PREFIX_OFFSET, data, len);
+}
+
+static int horus3a_write_regs(struct horus3a_priv *priv,
+ u8 reg, const u8 *data, u32 len)
+{
+ int ret;
+ u8 buf[MAX_WRITE_REGSIZE + 1];
+ struct i2c_msg msg[1] = {
+ {
+ .addr = priv->i2c_address,
+ .flags = 0,
+ .len = len + 1,
+ .buf = buf,
+ }
+ };
+
+ if (len + 1 >= sizeof(buf)) {
+ dev_warn(&priv->i2c->dev,"wr reg=%04x: len=%d is too big!\n",
+ reg, len + 1);
+ return -E2BIG;
+ }
+
+ horus3a_i2c_debug(priv, reg, 1, data, len);
+ buf[0] = reg;
+ memcpy(&buf[1], data, len);
+ ret = i2c_transfer(priv->i2c, msg, 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EREMOTEIO;
+ if (ret < 0) {
+ dev_warn(&priv->i2c->dev,
+ "%s: i2c wr failed=%d reg=%02x len=%d\n",
+ KBUILD_MODNAME, ret, reg, len);
+ return ret;
+ }
+ return 0;
+}
+
+static int horus3a_write_reg(struct horus3a_priv *priv, u8 reg, u8 val)
+{
+ return horus3a_write_regs(priv, reg, &val, 1);
+}
+
+static int horus3a_enter_power_save(struct horus3a_priv *priv)
+{
+ u8 data[2];
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state == STATE_SLEEP)
+ return 0;
+ /* IQ Generator disable */
+ horus3a_write_reg(priv, 0x2a, 0x79);
+ /* MDIV_EN = 0 */
+ horus3a_write_reg(priv, 0x29, 0x70);
+ /* VCO disable preparation */
+ horus3a_write_reg(priv, 0x28, 0x3e);
+ /* VCO buffer disable */
+ horus3a_write_reg(priv, 0x2a, 0x19);
+ /* VCO calibration disable */
+ horus3a_write_reg(priv, 0x1c, 0x00);
+ /* Power save setting (xtal is not stopped) */
+ data[0] = 0xC0;
+ /* LNA is Disabled */
+ data[1] = 0xA7;
+ /* 0x11 - 0x12 */
+ horus3a_write_regs(priv, 0x11, data, sizeof(data));
+ priv->state = STATE_SLEEP;
+ return 0;
+}
+
+static int horus3a_leave_power_save(struct horus3a_priv *priv)
+{
+ u8 data[2];
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ if (priv->state == STATE_ACTIVE)
+ return 0;
+ /* Leave power save */
+ data[0] = 0x00;
+ /* LNA is Disabled */
+ data[1] = 0xa7;
+ /* 0x11 - 0x12 */
+ horus3a_write_regs(priv, 0x11, data, sizeof(data));
+ /* VCO buffer enable */
+ horus3a_write_reg(priv, 0x2a, 0x79);
+ /* VCO calibration enable */
+ horus3a_write_reg(priv, 0x1c, 0xc0);
+ /* MDIV_EN = 1 */
+ horus3a_write_reg(priv, 0x29, 0x71);
+ usleep_range(5000, 7000);
+ priv->state = STATE_ACTIVE;
+ return 0;
+}
+
+static int horus3a_init(struct dvb_frontend *fe)
+{
+ struct horus3a_priv *priv = fe->tuner_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ return 0;
+}
+
+static int horus3a_release(struct dvb_frontend *fe)
+{
+ struct horus3a_priv *priv = fe->tuner_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ kfree(fe->tuner_priv);
+ fe->tuner_priv = NULL;
+ return 0;
+}
+
+static int horus3a_sleep(struct dvb_frontend *fe)
+{
+ struct horus3a_priv *priv = fe->tuner_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ horus3a_enter_power_save(priv);
+ return 0;
+}
+
+static int horus3a_set_params(struct dvb_frontend *fe)
+{
+ struct dtv_frontend_properties *p = &fe->dtv_property_cache;
+ struct horus3a_priv *priv = fe->tuner_priv;
+ u32 frequency = p->frequency;
+ u32 symbol_rate = p->symbol_rate/1000;
+ u8 mixdiv = 0;
+ u8 mdiv = 0;
+ u32 ms = 0;
+ u8 f_ctl = 0;
+ u8 g_ctl = 0;
+ u8 fc_lpf = 0;
+ u8 data[5];
+
+ dev_dbg(&priv->i2c->dev, "%s(): frequency %dkHz symbol_rate %dksps\n",
+ __func__, frequency, symbol_rate);
+ if (priv->set_tuner)
+ priv->set_tuner(priv->set_tuner_data, 0);
+ if (priv->state == STATE_SLEEP)
+ horus3a_leave_power_save(priv);
+
+ /* frequency should be X MHz (X : integer) */
+ frequency = DIV_ROUND_CLOSEST(frequency, 1000) * 1000;
+ if (frequency <= 1155000) {
+ mixdiv = 4;
+ mdiv = 1;
+ } else {
+ mixdiv = 2;
+ mdiv = 0;
+ }
+ /* Assumed that fREF == 1MHz (1000kHz) */
+ ms = DIV_ROUND_CLOSEST((frequency * mixdiv) / 2, 1000);
+ if (ms > 0x7FFF) { /* 15 bit */
+ dev_err(&priv->i2c->dev, "horus3a: invalid frequency %d\n",
+ frequency);
+ return -EINVAL;
+ }
+ if (frequency < 975000) {
+ /* F_CTL=11100 G_CTL=001 */
+ f_ctl = 0x1C;
+ g_ctl = 0x01;
+ } else if (frequency < 1050000) {
+ /* F_CTL=11000 G_CTL=010 */
+ f_ctl = 0x18;
+ g_ctl = 0x02;
+ } else if (frequency < 1150000) {
+ /* F_CTL=10100 G_CTL=010 */
+ f_ctl = 0x14;
+ g_ctl = 0x02;
+ } else if (frequency < 1250000) {
+ /* F_CTL=10000 G_CTL=011 */
+ f_ctl = 0x10;
+ g_ctl = 0x03;
+ } else if (frequency < 1350000) {
+ /* F_CTL=01100 G_CTL=100 */
+ f_ctl = 0x0C;
+ g_ctl = 0x04;
+ } else if (frequency < 1450000) {
+ /* F_CTL=01010 G_CTL=100 */
+ f_ctl = 0x0A;
+ g_ctl = 0x04;
+ } else if (frequency < 1600000) {
+ /* F_CTL=00111 G_CTL=101 */
+ f_ctl = 0x07;
+ g_ctl = 0x05;
+ } else if (frequency < 1800000) {
+ /* F_CTL=00100 G_CTL=010 */
+ f_ctl = 0x04;
+ g_ctl = 0x02;
+ } else if (frequency < 2000000) {
+ /* F_CTL=00010 G_CTL=001 */
+ f_ctl = 0x02;
+ g_ctl = 0x01;
+ } else {
+ /* F_CTL=00000 G_CTL=000 */
+ f_ctl = 0x00;
+ g_ctl = 0x00;
+ }
+ /* LPF cutoff frequency setting */
+ if (p->delivery_system == SYS_DVBS) {
+ /*
+ * rolloff = 0.35
+ * SR <= 4.3
+ * fc_lpf = 5
+ * 4.3 < SR <= 10
+ * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2 =
+ * SR * 1.175 = SR * (47/40)
+ * 10 < SR
+ * fc_lpf = SR * (1 + rolloff) / 2 + 5 =
+ * SR * 0.675 + 5 = SR * (27/40) + 5
+ * NOTE: The result should be round up.
+ */
+ if (symbol_rate <= 4300)
+ fc_lpf = 5;
+ else if (symbol_rate <= 10000)
+ fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 47, 40000);
+ else
+ fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 27, 40000) + 5;
+ /* 5 <= fc_lpf <= 36 */
+ if (fc_lpf > 36)
+ fc_lpf = 36;
+ } else if (p->delivery_system == SYS_DVBS2) {
+ int rolloff;
+
+ switch (p->rolloff) {
+ case ROLLOFF_35:
+ rolloff = 35;
+ break;
+ case ROLLOFF_25:
+ rolloff = 25;
+ break;
+ case ROLLOFF_20:
+ rolloff = 20;
+ break;
+ case ROLLOFF_AUTO:
+ default:
+ dev_err(&priv->i2c->dev,
+ "horus3a: auto roll-off is not supported\n");
+ return -EINVAL;
+ }
+ /*
+ * SR <= 4.5:
+ * fc_lpf = 5
+ * 4.5 < SR <= 10:
+ * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2
+ * 10 < SR:
+ * fc_lpf = SR * (1 + rolloff) / 2 + 5
+ * NOTE: The result should be round up.
+ */
+ if (symbol_rate <= 4500)
+ fc_lpf = 5;
+ else if (symbol_rate <= 10000)
+ fc_lpf = (u8)DIV_ROUND_UP(
+ symbol_rate * (200 + rolloff), 200000);
+ else
+ fc_lpf = (u8)DIV_ROUND_UP(
+ symbol_rate * (100 + rolloff), 200000) + 5;
+ /* 5 <= fc_lpf <= 36 is valid */
+ if (fc_lpf > 36)
+ fc_lpf = 36;
+ } else {
+ dev_err(&priv->i2c->dev,
+ "horus3a: invalid delivery system %d\n",
+ p->delivery_system);
+ return -EINVAL;
+ }
+ /* 0x00 - 0x04 */
+ data[0] = (u8)((ms >> 7) & 0xFF);
+ data[1] = (u8)((ms << 1) & 0xFF);
+ data[2] = 0x00;
+ data[3] = 0x00;
+ data[4] = (u8)(mdiv << 7);
+ horus3a_write_regs(priv, 0x00, data, sizeof(data));
+ /* Write G_CTL, F_CTL */
+ horus3a_write_reg(priv, 0x09, (u8)((g_ctl << 5) | f_ctl));
+ /* Write LPF cutoff frequency */
+ horus3a_write_reg(priv, 0x37, (u8)(0x80 | (fc_lpf << 1)));
+ /* Start Calibration */
+ horus3a_write_reg(priv, 0x05, 0x80);
+ /* IQ Generator enable */
+ horus3a_write_reg(priv, 0x2a, 0x7b);
+ /* tuner stabilization time */
+ msleep(60);
+ /* Store tuned frequency to the struct */
+ priv->frequency = ms * 2 * 1000 / mixdiv;
+ return 0;
+}
+
+static int horus3a_get_frequency(struct dvb_frontend *fe, u32 *frequency)
+{
+ struct horus3a_priv *priv = fe->tuner_priv;
+
+ *frequency = priv->frequency;
+ return 0;
+}
+
+static struct dvb_tuner_ops horus3a_tuner_ops = {
+ .info = {
+ .name = "Sony Horus3a",
+ .frequency_min = 950000,
+ .frequency_max = 2150000,
+ .frequency_step = 1000,
+ },
+ .init = horus3a_init,
+ .release = horus3a_release,
+ .sleep = horus3a_sleep,
+ .set_params = horus3a_set_params,
+ .get_frequency = horus3a_get_frequency,
+};
+
+struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe,
+ const struct horus3a_config *config,
+ struct i2c_adapter *i2c)
+{
+ u8 buf[3], val;
+ struct horus3a_priv *priv = NULL;
+
+ priv = kzalloc(sizeof(struct horus3a_priv), GFP_KERNEL);
+ if (priv == NULL)
+ return NULL;
+ priv->i2c_address = (config->i2c_address >> 1);
+ priv->i2c = i2c;
+ priv->set_tuner_data = config->set_tuner_priv;
+ priv->set_tuner = config->set_tuner_callback;
+
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 1);
+
+ /* wait 4ms after power on */
+ usleep_range(4000, 6000);
+ /* IQ Generator disable */
+ horus3a_write_reg(priv, 0x2a, 0x79);
+ /* REF_R = Xtal Frequency */
+ buf[0] = config->xtal_freq_mhz;
+ buf[1] = config->xtal_freq_mhz;
+ buf[2] = 0;
+ /* 0x6 - 0x8 */
+ horus3a_write_regs(priv, 0x6, buf, 3);
+ /* IQ Out = Single Ended */
+ horus3a_write_reg(priv, 0x0a, 0x40);
+ switch (config->xtal_freq_mhz) {
+ case 27:
+ val = 0x1f;
+ break;
+ case 24:
+ val = 0x10;
+ break;
+ case 16:
+ val = 0xc;
+ break;
+ default:
+ val = 0;
+ dev_warn(&priv->i2c->dev,
+ "horus3a: invalid xtal frequency %dMHz\n",
+ config->xtal_freq_mhz);
+ break;
+ }
+ val <<= 2;
+ horus3a_write_reg(priv, 0x0e, val);
+ horus3a_enter_power_save(priv);
+ usleep_range(3000, 5000);
+
+ if (fe->ops.i2c_gate_ctrl)
+ fe->ops.i2c_gate_ctrl(fe, 0);
+
+ memcpy(&fe->ops.tuner_ops, &horus3a_tuner_ops,
+ sizeof(struct dvb_tuner_ops));
+ fe->tuner_priv = priv;
+ dev_info(&priv->i2c->dev,
+ "Sony HORUS3A attached on addr=%x at I2C adapter %p\n",
+ priv->i2c_address, priv->i2c);
+ return fe;
+}
+EXPORT_SYMBOL(horus3a_attach);
+
+MODULE_DESCRIPTION("Sony HORUS3A sattelite tuner driver");
+MODULE_AUTHOR("Sergey Kozlov <serjk@netup.ru>");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb-frontends/horus3a.h b/drivers/media/dvb-frontends/horus3a.h
new file mode 100644
index 000000000000..b055319d532e
--- /dev/null
+++ b/drivers/media/dvb-frontends/horus3a.h
@@ -0,0 +1,58 @@
+/*
+ * horus3a.h
+ *
+ * Sony Horus3A DVB-S/S2 tuner driver
+ *
+ * Copyright 2012 Sony Corporation
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef __DVB_HORUS3A_H__
+#define __DVB_HORUS3A_H__
+
+#include <linux/kconfig.h>
+#include <linux/dvb/frontend.h>
+#include <linux/i2c.h>
+
+/**
+ * struct horus3a_config - the configuration of Horus3A tuner driver
+ * @i2c_address: I2C address of the tuner
+ * @xtal_freq_mhz: Oscillator frequency, MHz
+ * @set_tuner_priv: Callback function private context
+ * @set_tuner_callback: Callback function that notifies the parent driver
+ * which tuner is active now
+ */
+struct horus3a_config {
+ u8 i2c_address;
+ u8 xtal_freq_mhz;
+ void *set_tuner_priv;
+ int (*set_tuner_callback)(void *, int);
+};
+
+#if IS_REACHABLE(CONFIG_DVB_HORUS3A)
+extern struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe,
+ const struct horus3a_config *config,
+ struct i2c_adapter *i2c);
+#else
+static inline struct dvb_frontend *horus3a_attach(
+ const struct cxd2820r_config *config,
+ struct i2c_adapter *i2c)
+{
+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+ return NULL;
+}
+#endif
+
+#endif
diff --git a/drivers/media/dvb-frontends/lnbh25.c b/drivers/media/dvb-frontends/lnbh25.c
new file mode 100644
index 000000000000..ef3021e964be
--- /dev/null
+++ b/drivers/media/dvb-frontends/lnbh25.c
@@ -0,0 +1,189 @@
+/*
+ * lnbh25.c
+ *
+ * Driver for LNB supply and control IC LNBH25
+ *
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/slab.h>
+
+#include "dvb_frontend.h"
+#include "lnbh25.h"
+
+/**
+ * struct lnbh25_priv - LNBH25 driver private data
+ * @i2c: pointer to the I2C adapter structure
+ * @i2c_address: I2C address of LNBH25 SEC chip
+ * @config: Registers configuration:
+ * offset 0: 1st register address, always 0x02 (DATA1)
+ * offset 1: DATA1 register value
+ * offset 2: DATA2 register value
+ */
+struct lnbh25_priv {
+ struct i2c_adapter *i2c;
+ u8 i2c_address;
+ u8 config[3];
+};
+
+#define LNBH25_STATUS_OFL 0x1
+#define LNBH25_STATUS_VMON 0x4
+#define LNBH25_VSEL_13 0x03
+#define LNBH25_VSEL_18 0x0a
+
+static int lnbh25_read_vmon(struct lnbh25_priv *priv)
+{
+ int i, ret;
+ u8 addr = 0x00;
+ u8 status[6];
+ struct i2c_msg msg[2] = {
+ {
+ .addr = priv->i2c_address,
+ .flags = 0,
+ .len = 1,
+ .buf = &addr
+ }, {
+ .addr = priv->i2c_address,
+ .flags = I2C_M_RD,
+ .len = sizeof(status),
+ .buf = status
+ }
+ };
+
+ for (i = 0; i < 2; i++) {
+ ret = i2c_transfer(priv->i2c, &msg[i], 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EIO;
+ if (ret < 0) {
+ dev_dbg(&priv->i2c->dev,
+ "%s(): I2C transfer %d failed (%d)\n",
+ __func__, i, ret);
+ return ret;
+ }
+ }
+ print_hex_dump_bytes("lnbh25_read_vmon: ",
+ DUMP_PREFIX_OFFSET, status, sizeof(status));
+ if ((status[0] & (LNBH25_STATUS_OFL | LNBH25_STATUS_VMON)) != 0) {
+ dev_err(&priv->i2c->dev,
+ "%s(): voltage in failure state, status reg 0x%x\n",
+ __func__, status[0]);
+ return -EIO;
+ }
+ return 0;
+}
+
+static int lnbh25_set_voltage(struct dvb_frontend *fe,
+ enum fe_sec_voltage voltage)
+{
+ int ret;
+ u8 data1_reg;
+ const char *vsel;
+ struct lnbh25_priv *priv = fe->sec_priv;
+ struct i2c_msg msg = {
+ .addr = priv->i2c_address,
+ .flags = 0,
+ .len = sizeof(priv->config),
+ .buf = priv->config
+ };
+
+ switch (voltage) {
+ case SEC_VOLTAGE_OFF:
+ data1_reg = 0x00;
+ vsel = "Off";
+ break;
+ case SEC_VOLTAGE_13:
+ data1_reg = LNBH25_VSEL_13;
+ vsel = "13V";
+ break;
+ case SEC_VOLTAGE_18:
+ data1_reg = LNBH25_VSEL_18;
+ vsel = "18V";
+ break;
+ default:
+ return -EINVAL;
+ }
+ priv->config[1] = data1_reg;
+ dev_dbg(&priv->i2c->dev,
+ "%s(): %s, I2C 0x%x write [ %02x %02x %02x ]\n",
+ __func__, vsel, priv->i2c_address,
+ priv->config[0], priv->config[1], priv->config[2]);
+ ret = i2c_transfer(priv->i2c, &msg, 1);
+ if (ret >= 0 && ret != 1)
+ ret = -EIO;
+ if (ret < 0) {
+ dev_err(&priv->i2c->dev, "%s(): I2C transfer error (%d)\n",
+ __func__, ret);
+ return ret;
+ }
+ if (voltage != SEC_VOLTAGE_OFF) {
+ msleep(120);
+ ret = lnbh25_read_vmon(priv);
+ } else {
+ msleep(20);
+ ret = 0;
+ }
+ return ret;
+}
+
+static void lnbh25_release(struct dvb_frontend *fe)
+{
+ struct lnbh25_priv *priv = fe->sec_priv;
+
+ dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
+ lnbh25_set_voltage(fe, SEC_VOLTAGE_OFF);
+ kfree(fe->sec_priv);
+ fe->sec_priv = NULL;
+}
+
+struct dvb_frontend *lnbh25_attach(struct dvb_frontend *fe,
+ struct lnbh25_config *cfg,
+ struct i2c_adapter *i2c)
+{
+ struct lnbh25_priv *priv;
+
+ dev_dbg(&i2c->dev, "%s()\n", __func__);
+ priv = kzalloc(sizeof(struct lnbh25_priv), GFP_KERNEL);
+ if (!priv)
+ return NULL;
+ priv->i2c_address = (cfg->i2c_address >> 1);
+ priv->i2c = i2c;
+ priv->config[0] = 0x02;
+ priv->config[1] = 0x00;
+ priv->config[2] = cfg->data2_config;
+ fe->sec_priv = priv;
+ if (lnbh25_set_voltage(fe, SEC_VOLTAGE_OFF)) {
+ dev_err(&i2c->dev,
+ "%s(): no LNBH25 found at I2C addr 0x%02x\n",
+ __func__, priv->i2c_address);
+ kfree(priv);
+ fe->sec_priv = NULL;
+ return NULL;
+ }
+
+ fe->ops.release_sec = lnbh25_release;
+ fe->ops.set_voltage = lnbh25_set_voltage;
+
+ dev_err(&i2c->dev, "%s(): attached at I2C addr 0x%02x\n",
+ __func__, priv->i2c_address);
+ return fe;
+}
+EXPORT_SYMBOL(lnbh25_attach);
+
+MODULE_DESCRIPTION("ST LNBH25 driver");
+MODULE_AUTHOR("info@netup.ru");
+MODULE_LICENSE("GPL");
diff --git a/drivers/media/dvb-frontends/lnbh25.h b/drivers/media/dvb-frontends/lnbh25.h
new file mode 100644
index 000000000000..69f30e21f6b3
--- /dev/null
+++ b/drivers/media/dvb-frontends/lnbh25.h
@@ -0,0 +1,56 @@
+/*
+ * lnbh25.c
+ *
+ * Driver for LNB supply and control IC LNBH25
+ *
+ * Copyright (C) 2014 NetUP Inc.
+ * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
+ * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef LNBH25_H
+#define LNBH25_H
+
+#include <linux/i2c.h>
+#include <linux/kconfig.h>
+#include <linux/dvb/frontend.h>
+
+/* 22 kHz tone enabled. Tone output controlled by DSQIN pin */
+#define LNBH25_TEN 0x01
+/* Low power mode activated (used only with 22 kHz tone output disabled) */
+#define LNBH25_LPM 0x02
+/* DSQIN input pin is set to receive external 22 kHz TTL signal source */
+#define LNBH25_EXTM 0x04
+
+struct lnbh25_config {
+ u8 i2c_address;
+ u8 data2_config;
+};
+
+#if IS_REACHABLE(CONFIG_DVB_LNBH25)
+struct dvb_frontend *lnbh25_attach(
+ struct dvb_frontend *fe,
+ struct lnbh25_config *cfg,
+ struct i2c_adapter *i2c);
+#else
+static inline dvb_frontend *lnbh25_attach(
+ struct dvb_frontend *fe,
+ struct lnbh25_config *cfg,
+ struct i2c_adapter *i2c)
+{
+ printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
+ return NULL;
+}
+#endif
+
+#endif
diff --git a/drivers/media/dvb-frontends/m88ds3103.c b/drivers/media/dvb-frontends/m88ds3103.c
index e9b2d2b69b1d..ff31e7a01ca9 100644
--- a/drivers/media/dvb-frontends/m88ds3103.c
+++ b/drivers/media/dvb-frontends/m88ds3103.c
@@ -1495,7 +1495,6 @@ MODULE_DEVICE_TABLE(i2c, m88ds3103_id_table);
static struct i2c_driver m88ds3103_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "m88ds3103",
.suppress_bind_attrs = true,
},
diff --git a/drivers/media/dvb-frontends/rtl2830.c b/drivers/media/dvb-frontends/rtl2830.c
index 3d01f4f22aca..b792f305cf15 100644
--- a/drivers/media/dvb-frontends/rtl2830.c
+++ b/drivers/media/dvb-frontends/rtl2830.c
@@ -915,7 +915,6 @@ MODULE_DEVICE_TABLE(i2c, rtl2830_id_table);
static struct i2c_driver rtl2830_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "rtl2830",
},
.probe = rtl2830_probe,
diff --git a/drivers/media/dvb-frontends/rtl2832.c b/drivers/media/dvb-frontends/rtl2832.c
index 822ea4b7a7ff..78b87b260d74 100644
--- a/drivers/media/dvb-frontends/rtl2832.c
+++ b/drivers/media/dvb-frontends/rtl2832.c
@@ -1319,7 +1319,6 @@ MODULE_DEVICE_TABLE(i2c, rtl2832_id_table);
static struct i2c_driver rtl2832_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "rtl2832",
},
.probe = rtl2832_probe,
diff --git a/drivers/media/dvb-frontends/rtl2832_sdr.c b/drivers/media/dvb-frontends/rtl2832_sdr.c
index 7edb885ae9c8..d5b994f17612 100644
--- a/drivers/media/dvb-frontends/rtl2832_sdr.c
+++ b/drivers/media/dvb-frontends/rtl2832_sdr.c
@@ -1538,7 +1538,6 @@ static int rtl2832_sdr_remove(struct platform_device *pdev)
static struct platform_driver rtl2832_sdr_driver = {
.driver = {
.name = "rtl2832_sdr",
- .owner = THIS_MODULE,
},
.probe = rtl2832_sdr_probe,
.remove = rtl2832_sdr_remove,
diff --git a/drivers/media/dvb-frontends/s921.c b/drivers/media/dvb-frontends/s921.c
index b2d9fe13e1a0..d6a8fa63040b 100644
--- a/drivers/media/dvb-frontends/s921.c
+++ b/drivers/media/dvb-frontends/s921.c
@@ -466,7 +466,7 @@ static int s921_tune(struct dvb_frontend *fe,
static int s921_get_algo(struct dvb_frontend *fe)
{
- return 1; /* FE_ALGO_HW */
+ return DVBFE_ALGO_HW;
}
static void s921_release(struct dvb_frontend *fe)
diff --git a/drivers/media/dvb-frontends/si2168.c b/drivers/media/dvb-frontends/si2168.c
index 25e238c370e5..81788c5a44d8 100644
--- a/drivers/media/dvb-frontends/si2168.c
+++ b/drivers/media/dvb-frontends/si2168.c
@@ -757,7 +757,6 @@ MODULE_DEVICE_TABLE(i2c, si2168_id_table);
static struct i2c_driver si2168_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "si2168",
},
.probe = si2168_probe,
diff --git a/drivers/media/dvb-frontends/sp2.c b/drivers/media/dvb-frontends/sp2.c
index 8fd42767e263..43d47dfcc7b8 100644
--- a/drivers/media/dvb-frontends/sp2.c
+++ b/drivers/media/dvb-frontends/sp2.c
@@ -426,7 +426,6 @@ MODULE_DEVICE_TABLE(i2c, sp2_id);
static struct i2c_driver sp2_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "sp2",
},
.probe = sp2_probe,
diff --git a/drivers/media/dvb-frontends/stv0367.c b/drivers/media/dvb-frontends/stv0367.c
index ec3e18e5ff50..44cb73f68af6 100644
--- a/drivers/media/dvb-frontends/stv0367.c
+++ b/drivers/media/dvb-frontends/stv0367.c
@@ -791,11 +791,13 @@ int stv0367_writeregs(struct stv0367_state *state, u16 reg, u8 *data, int len)
memcpy(buf + 2, data, len);
if (i2cdebug)
- printk(KERN_DEBUG "%s: %02x: %02x\n", __func__, reg, buf[2]);
+ printk(KERN_DEBUG "%s: [%02x] %02x: %02x\n", __func__,
+ state->config->demod_address, reg, buf[2]);
ret = i2c_transfer(state->i2c, &msg, 1);
if (ret != 1)
- printk(KERN_ERR "%s: i2c write error!\n", __func__);
+ printk(KERN_ERR "%s: i2c write error! ([%02x] %02x: %02x)\n",
+ __func__, state->config->demod_address, reg, buf[2]);
return (ret != 1) ? -EREMOTEIO : 0;
}
@@ -829,10 +831,12 @@ static u8 stv0367_readreg(struct stv0367_state *state, u16 reg)
ret = i2c_transfer(state->i2c, msg, 2);
if (ret != 2)
- printk(KERN_ERR "%s: i2c read error\n", __func__);
+ printk(KERN_ERR "%s: i2c read error ([%02x] %02x: %02x)\n",
+ __func__, state->config->demod_address, reg, b1[0]);
if (i2cdebug)
- printk(KERN_DEBUG "%s: %02x: %02x\n", __func__, reg, b1[0]);
+ printk(KERN_DEBUG "%s: [%02x] %02x: %02x\n", __func__,
+ state->config->demod_address, reg, b1[0]);
return b1[0];
}
@@ -1550,6 +1554,11 @@ static int stv0367ter_init(struct dvb_frontend *fe)
switch (state->config->xtal) {
/*set internal freq to 53.125MHz */
+ case 16000000:
+ stv0367_writereg(state, R367TER_PLLMDIV, 0x2);
+ stv0367_writereg(state, R367TER_PLLNDIV, 0x1b);
+ stv0367_writereg(state, R367TER_PLLSETUP, 0x18);
+ break;
case 25000000:
stv0367_writereg(state, R367TER_PLLMDIV, 0xa);
stv0367_writereg(state, R367TER_PLLNDIV, 0x55);
diff --git a/drivers/media/dvb-frontends/tda10071.c b/drivers/media/dvb-frontends/tda10071.c
index f6dc6307d35a..119d47596ac8 100644
--- a/drivers/media/dvb-frontends/tda10071.c
+++ b/drivers/media/dvb-frontends/tda10071.c
@@ -20,102 +20,15 @@
#include "tda10071_priv.h"
-/* Max transfer size done by I2C transfer functions */
-#define MAX_XFER_SIZE 64
-
static struct dvb_frontend_ops tda10071_ops;
-/* write multiple registers */
-static int tda10071_wr_regs(struct tda10071_priv *priv, u8 reg, u8 *val,
- int len)
-{
- int ret;
- u8 buf[MAX_XFER_SIZE];
- struct i2c_msg msg[1] = {
- {
- .addr = priv->cfg.demod_i2c_addr,
- .flags = 0,
- .len = 1 + len,
- .buf = buf,
- }
- };
-
- if (1 + len > sizeof(buf)) {
- dev_warn(&priv->i2c->dev,
- "%s: i2c wr reg=%04x: len=%d is too big!\n",
- KBUILD_MODNAME, reg, len);
- return -EINVAL;
- }
-
- buf[0] = reg;
- memcpy(&buf[1], val, len);
-
- ret = i2c_transfer(priv->i2c, msg, 1);
- if (ret == 1) {
- ret = 0;
- } else {
- dev_warn(&priv->i2c->dev,
- "%s: i2c wr failed=%d reg=%02x len=%d\n",
- KBUILD_MODNAME, ret, reg, len);
- ret = -EREMOTEIO;
- }
- return ret;
-}
-
-/* read multiple registers */
-static int tda10071_rd_regs(struct tda10071_priv *priv, u8 reg, u8 *val,
- int len)
-{
- int ret;
- u8 buf[MAX_XFER_SIZE];
- struct i2c_msg msg[2] = {
- {
- .addr = priv->cfg.demod_i2c_addr,
- .flags = 0,
- .len = 1,
- .buf = &reg,
- }, {
- .addr = priv->cfg.demod_i2c_addr,
- .flags = I2C_M_RD,
- .len = len,
- .buf = buf,
- }
- };
-
- if (len > sizeof(buf)) {
- dev_warn(&priv->i2c->dev,
- "%s: i2c wr reg=%04x: len=%d is too big!\n",
- KBUILD_MODNAME, reg, len);
- return -EINVAL;
- }
-
- ret = i2c_transfer(priv->i2c, msg, 2);
- if (ret == 2) {
- memcpy(val, buf, len);
- ret = 0;
- } else {
- dev_warn(&priv->i2c->dev,
- "%s: i2c rd failed=%d reg=%02x len=%d\n",
- KBUILD_MODNAME, ret, reg, len);
- ret = -EREMOTEIO;
- }
- return ret;
-}
-
-/* write single register */
-static int tda10071_wr_reg(struct tda10071_priv *priv, u8 reg, u8 val)
-{
- return tda10071_wr_regs(priv, reg, &val, 1);
-}
-
-/* read single register */
-static int tda10071_rd_reg(struct tda10071_priv *priv, u8 reg, u8 *val)
-{
- return tda10071_rd_regs(priv, reg, val, 1);
-}
-
+/*
+ * XXX: regmap_update_bits() does not fit our needs as it does not support
+ * partially volatile registers. Also it performs register read even mask is as
+ * wide as register value.
+ */
/* write single register with mask */
-static int tda10071_wr_reg_mask(struct tda10071_priv *priv,
+static int tda10071_wr_reg_mask(struct tda10071_dev *dev,
u8 reg, u8 val, u8 mask)
{
int ret;
@@ -123,7 +36,7 @@ static int tda10071_wr_reg_mask(struct tda10071_priv *priv,
/* no need for read if whole reg is written */
if (mask != 0xff) {
- ret = tda10071_rd_regs(priv, reg, &tmp, 1);
+ ret = regmap_bulk_read(dev->regmap, reg, &tmp, 1);
if (ret)
return ret;
@@ -132,64 +45,45 @@ static int tda10071_wr_reg_mask(struct tda10071_priv *priv,
val |= tmp;
}
- return tda10071_wr_regs(priv, reg, &val, 1);
-}
-
-/* read single register with mask */
-static int tda10071_rd_reg_mask(struct tda10071_priv *priv,
- u8 reg, u8 *val, u8 mask)
-{
- int ret, i;
- u8 tmp;
-
- ret = tda10071_rd_regs(priv, reg, &tmp, 1);
- if (ret)
- return ret;
-
- tmp &= mask;
-
- /* find position of the first bit */
- for (i = 0; i < 8; i++) {
- if ((mask >> i) & 0x01)
- break;
- }
- *val = tmp >> i;
-
- return 0;
+ return regmap_bulk_write(dev->regmap, reg, &val, 1);
}
/* execute firmware command */
-static int tda10071_cmd_execute(struct tda10071_priv *priv,
+static int tda10071_cmd_execute(struct tda10071_dev *dev,
struct tda10071_cmd *cmd)
{
+ struct i2c_client *client = dev->client;
int ret, i;
- u8 tmp;
+ unsigned int uitmp;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
+ mutex_lock(&dev->cmd_execute_mutex);
+
/* write cmd and args for firmware */
- ret = tda10071_wr_regs(priv, 0x00, cmd->args, cmd->len);
+ ret = regmap_bulk_write(dev->regmap, 0x00, cmd->args, cmd->len);
if (ret)
- goto error;
+ goto error_mutex_unlock;
/* start cmd execution */
- ret = tda10071_wr_reg(priv, 0x1f, 1);
+ ret = regmap_write(dev->regmap, 0x1f, 1);
if (ret)
- goto error;
+ goto error_mutex_unlock;
/* wait cmd execution terminate */
- for (i = 1000, tmp = 1; i && tmp; i--) {
- ret = tda10071_rd_reg(priv, 0x1f, &tmp);
+ for (i = 1000, uitmp = 1; i && uitmp; i--) {
+ ret = regmap_read(dev->regmap, 0x1f, &uitmp);
if (ret)
- goto error;
+ goto error_mutex_unlock;
usleep_range(200, 5000);
}
- dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
+ mutex_unlock(&dev->cmd_execute_mutex);
+ dev_dbg(&client->dev, "loop=%d\n", i);
if (i == 0) {
ret = -ETIMEDOUT;
@@ -197,26 +91,28 @@ static int tda10071_cmd_execute(struct tda10071_priv *priv,
}
return ret;
+error_mutex_unlock:
+ mutex_unlock(&dev->cmd_execute_mutex);
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_set_tone(struct dvb_frontend *fe,
enum fe_sec_tone_mode fe_sec_tone_mode)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct tda10071_cmd cmd;
int ret;
u8 tone;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
- dev_dbg(&priv->i2c->dev, "%s: tone_mode=%d\n", __func__,
- fe_sec_tone_mode);
+ dev_dbg(&client->dev, "tone_mode=%d\n", fe_sec_tone_mode);
switch (fe_sec_tone_mode) {
case SEC_TONE_ON:
@@ -226,8 +122,7 @@ static int tda10071_set_tone(struct dvb_frontend *fe,
tone = 0;
break;
default:
- dev_dbg(&priv->i2c->dev, "%s: invalid fe_sec_tone_mode\n",
- __func__);
+ dev_dbg(&client->dev, "invalid fe_sec_tone_mode\n");
ret = -EINVAL;
goto error;
}
@@ -238,30 +133,31 @@ static int tda10071_set_tone(struct dvb_frontend *fe,
cmd.args[3] = 0x00;
cmd.args[4] = tone;
cmd.len = 5;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_set_voltage(struct dvb_frontend *fe,
enum fe_sec_voltage fe_sec_voltage)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct tda10071_cmd cmd;
int ret;
u8 voltage;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
- dev_dbg(&priv->i2c->dev, "%s: voltage=%d\n", __func__, fe_sec_voltage);
+ dev_dbg(&client->dev, "voltage=%d\n", fe_sec_voltage);
switch (fe_sec_voltage) {
case SEC_VOLTAGE_13:
@@ -274,8 +170,7 @@ static int tda10071_set_voltage(struct dvb_frontend *fe,
voltage = 0;
break;
default:
- dev_dbg(&priv->i2c->dev, "%s: invalid fe_sec_voltage\n",
- __func__);
+ dev_dbg(&client->dev, "invalid fe_sec_voltage\n");
ret = -EINVAL;
goto error;
}
@@ -284,31 +179,31 @@ static int tda10071_set_voltage(struct dvb_frontend *fe,
cmd.args[1] = 0;
cmd.args[2] = voltage;
cmd.len = 3;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_diseqc_send_master_cmd(struct dvb_frontend *fe,
struct dvb_diseqc_master_cmd *diseqc_cmd)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct tda10071_cmd cmd;
int ret, i;
- u8 tmp;
+ unsigned int uitmp;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
- dev_dbg(&priv->i2c->dev, "%s: msg_len=%d\n", __func__,
- diseqc_cmd->msg_len);
+ dev_dbg(&client->dev, "msg_len=%d\n", diseqc_cmd->msg_len);
if (diseqc_cmd->msg_len < 3 || diseqc_cmd->msg_len > 6) {
ret = -EINVAL;
@@ -316,22 +211,22 @@ static int tda10071_diseqc_send_master_cmd(struct dvb_frontend *fe,
}
/* wait LNB TX */
- for (i = 500, tmp = 0; i && !tmp; i--) {
- ret = tda10071_rd_reg_mask(priv, 0x47, &tmp, 0x01);
+ for (i = 500, uitmp = 0; i && !uitmp; i--) {
+ ret = regmap_read(dev->regmap, 0x47, &uitmp);
if (ret)
goto error;
-
+ uitmp = (uitmp >> 0) & 1;
usleep_range(10000, 20000);
}
- dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
+ dev_dbg(&client->dev, "loop=%d\n", i);
if (i == 0) {
ret = -ETIMEDOUT;
goto error;
}
- ret = tda10071_wr_reg_mask(priv, 0x47, 0x00, 0x01);
+ ret = regmap_update_bits(dev->regmap, 0x47, 0x01, 0x00);
if (ret)
goto error;
@@ -344,41 +239,42 @@ static int tda10071_diseqc_send_master_cmd(struct dvb_frontend *fe,
cmd.args[6] = diseqc_cmd->msg_len;
memcpy(&cmd.args[7], diseqc_cmd->msg, diseqc_cmd->msg_len);
cmd.len = 7 + diseqc_cmd->msg_len;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_diseqc_recv_slave_reply(struct dvb_frontend *fe,
struct dvb_diseqc_slave_reply *reply)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct tda10071_cmd cmd;
int ret, i;
- u8 tmp;
+ unsigned int uitmp;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
- dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
+ dev_dbg(&client->dev, "\n");
/* wait LNB RX */
- for (i = 500, tmp = 0; i && !tmp; i--) {
- ret = tda10071_rd_reg_mask(priv, 0x47, &tmp, 0x02);
+ for (i = 500, uitmp = 0; i && !uitmp; i--) {
+ ret = regmap_read(dev->regmap, 0x47, &uitmp);
if (ret)
goto error;
-
+ uitmp = (uitmp >> 1) & 1;
usleep_range(10000, 20000);
}
- dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
+ dev_dbg(&client->dev, "loop=%d\n", i);
if (i == 0) {
ret = -ETIMEDOUT;
@@ -386,11 +282,11 @@ static int tda10071_diseqc_recv_slave_reply(struct dvb_frontend *fe,
}
/* reply len */
- ret = tda10071_rd_reg(priv, 0x46, &tmp);
+ ret = regmap_read(dev->regmap, 0x46, &uitmp);
if (ret)
goto error;
- reply->msg_len = tmp & 0x1f; /* [4:0] */
+ reply->msg_len = uitmp & 0x1f; /* [4:0] */
if (reply->msg_len > sizeof(reply->msg))
reply->msg_len = sizeof(reply->msg); /* truncate API max */
@@ -398,35 +294,37 @@ static int tda10071_diseqc_recv_slave_reply(struct dvb_frontend *fe,
cmd.args[0] = CMD_LNB_UPDATE_REPLY;
cmd.args[1] = 0;
cmd.len = 2;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
- ret = tda10071_rd_regs(priv, cmd.len, reply->msg, reply->msg_len);
+ ret = regmap_bulk_read(dev->regmap, cmd.len, reply->msg,
+ reply->msg_len);
if (ret)
goto error;
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_diseqc_send_burst(struct dvb_frontend *fe,
enum fe_sec_mini_cmd fe_sec_mini_cmd)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct tda10071_cmd cmd;
int ret, i;
- u8 tmp, burst;
+ unsigned int uitmp;
+ u8 burst;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
- dev_dbg(&priv->i2c->dev, "%s: fe_sec_mini_cmd=%d\n", __func__,
- fe_sec_mini_cmd);
+ dev_dbg(&client->dev, "fe_sec_mini_cmd=%d\n", fe_sec_mini_cmd);
switch (fe_sec_mini_cmd) {
case SEC_MINI_A:
@@ -436,29 +334,28 @@ static int tda10071_diseqc_send_burst(struct dvb_frontend *fe,
burst = 1;
break;
default:
- dev_dbg(&priv->i2c->dev, "%s: invalid fe_sec_mini_cmd\n",
- __func__);
+ dev_dbg(&client->dev, "invalid fe_sec_mini_cmd\n");
ret = -EINVAL;
goto error;
}
/* wait LNB TX */
- for (i = 500, tmp = 0; i && !tmp; i--) {
- ret = tda10071_rd_reg_mask(priv, 0x47, &tmp, 0x01);
+ for (i = 500, uitmp = 0; i && !uitmp; i--) {
+ ret = regmap_read(dev->regmap, 0x47, &uitmp);
if (ret)
goto error;
-
+ uitmp = (uitmp >> 0) & 1;
usleep_range(10000, 20000);
}
- dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
+ dev_dbg(&client->dev, "loop=%d\n", i);
if (i == 0) {
ret = -ETIMEDOUT;
goto error;
}
- ret = tda10071_wr_reg_mask(priv, 0x47, 0x00, 0x01);
+ ret = regmap_update_bits(dev->regmap, 0x47, 0x01, 0x00);
if (ret)
goto error;
@@ -466,219 +363,217 @@ static int tda10071_diseqc_send_burst(struct dvb_frontend *fe,
cmd.args[1] = 0;
cmd.args[2] = burst;
cmd.len = 3;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_read_status(struct dvb_frontend *fe, enum fe_status *status)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+ struct tda10071_cmd cmd;
int ret;
- u8 tmp;
+ unsigned int uitmp;
+ u8 buf[8];
*status = 0;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = 0;
goto error;
}
- ret = tda10071_rd_reg(priv, 0x39, &tmp);
+ ret = regmap_read(dev->regmap, 0x39, &uitmp);
if (ret)
goto error;
/* 0x39[0] tuner PLL */
- if (tmp & 0x02) /* demod PLL */
+ if (uitmp & 0x02) /* demod PLL */
*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
- if (tmp & 0x04) /* viterbi or LDPC*/
+ if (uitmp & 0x04) /* viterbi or LDPC*/
*status |= FE_HAS_VITERBI;
- if (tmp & 0x08) /* RS or BCH */
+ if (uitmp & 0x08) /* RS or BCH */
*status |= FE_HAS_SYNC | FE_HAS_LOCK;
- priv->fe_status = *status;
+ dev->fe_status = *status;
- return ret;
-error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
- return ret;
-}
+ /* signal strength */
+ if (dev->fe_status & FE_HAS_SIGNAL) {
+ cmd.args[0] = CMD_GET_AGCACC;
+ cmd.args[1] = 0;
+ cmd.len = 2;
+ ret = tda10071_cmd_execute(dev, &cmd);
+ if (ret)
+ goto error;
-static int tda10071_read_snr(struct dvb_frontend *fe, u16 *snr)
-{
- struct tda10071_priv *priv = fe->demodulator_priv;
- int ret;
- u8 buf[2];
+ /* input power estimate dBm */
+ ret = regmap_read(dev->regmap, 0x50, &uitmp);
+ if (ret)
+ goto error;
- if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) {
- *snr = 0;
- ret = 0;
- goto error;
+ c->strength.stat[0].scale = FE_SCALE_DECIBEL;
+ c->strength.stat[0].svalue = (int) (uitmp - 256) * 1000;
+ } else {
+ c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
}
- ret = tda10071_rd_regs(priv, 0x3a, buf, 2);
- if (ret)
- goto error;
+ /* CNR */
+ if (dev->fe_status & FE_HAS_VITERBI) {
+ /* Es/No */
+ ret = regmap_bulk_read(dev->regmap, 0x3a, buf, 2);
+ if (ret)
+ goto error;
- /* Es/No dBx10 */
- *snr = buf[0] << 8 | buf[1];
+ c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
+ c->cnr.stat[0].svalue = (buf[0] << 8 | buf[1] << 0) * 100;
+ } else {
+ c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ }
- return ret;
-error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
- return ret;
-}
+ /* UCB/PER/BER */
+ if (dev->fe_status & FE_HAS_LOCK) {
+ /* TODO: report total bits/packets */
+ u8 delivery_system, reg, len;
-static int tda10071_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
-{
- struct tda10071_priv *priv = fe->demodulator_priv;
- struct tda10071_cmd cmd;
- int ret;
- u8 tmp;
+ switch (dev->delivery_system) {
+ case SYS_DVBS:
+ reg = 0x4c;
+ len = 8;
+ delivery_system = 1;
+ break;
+ case SYS_DVBS2:
+ reg = 0x4d;
+ len = 4;
+ delivery_system = 0;
+ break;
+ default:
+ ret = -EINVAL;
+ goto error;
+ }
- if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) {
- *strength = 0;
- ret = 0;
- goto error;
- }
+ ret = regmap_read(dev->regmap, reg, &uitmp);
+ if (ret)
+ goto error;
- cmd.args[0] = CMD_GET_AGCACC;
- cmd.args[1] = 0;
- cmd.len = 2;
- ret = tda10071_cmd_execute(priv, &cmd);
- if (ret)
- goto error;
+ if (dev->meas_count == uitmp) {
+ dev_dbg(&client->dev, "meas not ready=%02x\n", uitmp);
+ ret = 0;
+ goto error;
+ } else {
+ dev->meas_count = uitmp;
+ }
- /* input power estimate dBm */
- ret = tda10071_rd_reg(priv, 0x50, &tmp);
- if (ret)
- goto error;
+ cmd.args[0] = CMD_BER_UPDATE_COUNTERS;
+ cmd.args[1] = 0;
+ cmd.args[2] = delivery_system;
+ cmd.len = 3;
+ ret = tda10071_cmd_execute(dev, &cmd);
+ if (ret)
+ goto error;
- if (tmp < 181)
- tmp = 181; /* -75 dBm */
- else if (tmp > 236)
- tmp = 236; /* -20 dBm */
+ ret = regmap_bulk_read(dev->regmap, cmd.len, buf, len);
+ if (ret)
+ goto error;
- /* scale value to 0x0000-0xffff */
- *strength = (tmp-181) * 0xffff / (236-181);
+ if (dev->delivery_system == SYS_DVBS) {
+ dev->dvbv3_ber = buf[0] << 24 | buf[1] << 16 |
+ buf[2] << 8 | buf[3] << 0;
+ dev->post_bit_error += buf[0] << 24 | buf[1] << 16 |
+ buf[2] << 8 | buf[3] << 0;
+ c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
+ c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
+ dev->block_error += buf[4] << 8 | buf[5] << 0;
+ c->block_error.stat[0].scale = FE_SCALE_COUNTER;
+ c->block_error.stat[0].uvalue = dev->block_error;
+ } else {
+ dev->dvbv3_ber = buf[0] << 8 | buf[1] << 0;
+ dev->post_bit_error += buf[0] << 8 | buf[1] << 0;
+ c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
+ c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
+ c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ }
+ } else {
+ c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ }
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
-static int tda10071_read_ber(struct dvb_frontend *fe, u32 *ber)
+static int tda10071_read_snr(struct dvb_frontend *fe, u16 *snr)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
- struct tda10071_cmd cmd;
- int ret, i, len;
- u8 tmp, reg, buf[8];
-
- if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) {
- *ber = priv->ber = 0;
- ret = 0;
- goto error;
- }
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
- switch (priv->delivery_system) {
- case SYS_DVBS:
- reg = 0x4c;
- len = 8;
- i = 1;
- break;
- case SYS_DVBS2:
- reg = 0x4d;
- len = 4;
- i = 0;
- break;
- default:
- *ber = priv->ber = 0;
- return 0;
- }
+ if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
+ *snr = div_s64(c->cnr.stat[0].svalue, 100);
+ else
+ *snr = 0;
+ return 0;
+}
- ret = tda10071_rd_reg(priv, reg, &tmp);
- if (ret)
- goto error;
+static int tda10071_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
+{
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
+ unsigned int uitmp;
- if (priv->meas_count[i] == tmp) {
- dev_dbg(&priv->i2c->dev, "%s: meas not ready=%02x\n", __func__,
- tmp);
- *ber = priv->ber;
- return 0;
+ if (c->strength.stat[0].scale == FE_SCALE_DECIBEL) {
+ uitmp = div_s64(c->strength.stat[0].svalue, 1000) + 256;
+ uitmp = clamp(uitmp, 181U, 236U); /* -75dBm - -20dBm */
+ /* scale value to 0x0000-0xffff */
+ *strength = (uitmp-181) * 0xffff / (236-181);
} else {
- priv->meas_count[i] = tmp;
+ *strength = 0;
}
+ return 0;
+}
- cmd.args[0] = CMD_BER_UPDATE_COUNTERS;
- cmd.args[1] = 0;
- cmd.args[2] = i;
- cmd.len = 3;
- ret = tda10071_cmd_execute(priv, &cmd);
- if (ret)
- goto error;
-
- ret = tda10071_rd_regs(priv, cmd.len, buf, len);
- if (ret)
- goto error;
-
- if (priv->delivery_system == SYS_DVBS) {
- *ber = (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
- priv->ucb += (buf[4] << 8) | buf[5];
- } else {
- *ber = (buf[0] << 8) | buf[1];
- }
- priv->ber = *ber;
+static int tda10071_read_ber(struct dvb_frontend *fe, u32 *ber)
+{
+ struct tda10071_dev *dev = fe->demodulator_priv;
- return ret;
-error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
- return ret;
+ *ber = dev->dvbv3_ber;
+ return 0;
}
static int tda10071_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
- int ret = 0;
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
- if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) {
+ if (c->block_error.stat[0].scale == FE_SCALE_COUNTER)
+ *ucblocks = c->block_error.stat[0].uvalue;
+ else
*ucblocks = 0;
- goto error;
- }
-
- /* UCB is updated when BER is read. Assume BER is read anyway. */
-
- *ucblocks = priv->ucb;
-
- return ret;
-error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
- return ret;
+ return 0;
}
static int tda10071_set_frontend(struct dvb_frontend *fe)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct tda10071_cmd cmd;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret, i;
u8 mode, rolloff, pilot, inversion, div;
enum fe_modulation modulation;
- dev_dbg(&priv->i2c->dev,
- "%s: delivery_system=%d modulation=%d frequency=%d symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
- __func__, c->delivery_system, c->modulation,
- c->frequency, c->symbol_rate, c->inversion, c->pilot,
- c->rolloff);
+ dev_dbg(&client->dev,
+ "delivery_system=%d modulation=%d frequency=%u symbol_rate=%d inversion=%d pilot=%d rolloff=%d\n",
+ c->delivery_system, c->modulation, c->frequency, c->symbol_rate,
+ c->inversion, c->pilot, c->rolloff);
- priv->delivery_system = SYS_UNDEFINED;
+ dev->delivery_system = SYS_UNDEFINED;
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
@@ -696,7 +591,7 @@ static int tda10071_set_frontend(struct dvb_frontend *fe)
inversion = 3;
break;
default:
- dev_dbg(&priv->i2c->dev, "%s: invalid inversion\n", __func__);
+ dev_dbg(&client->dev, "invalid inversion\n");
ret = -EINVAL;
goto error;
}
@@ -722,8 +617,7 @@ static int tda10071_set_frontend(struct dvb_frontend *fe)
break;
case ROLLOFF_AUTO:
default:
- dev_dbg(&priv->i2c->dev, "%s: invalid rolloff\n",
- __func__);
+ dev_dbg(&client->dev, "invalid rolloff\n");
ret = -EINVAL;
goto error;
}
@@ -739,15 +633,13 @@ static int tda10071_set_frontend(struct dvb_frontend *fe)
pilot = 2;
break;
default:
- dev_dbg(&priv->i2c->dev, "%s: invalid pilot\n",
- __func__);
+ dev_dbg(&client->dev, "invalid pilot\n");
ret = -EINVAL;
goto error;
}
break;
default:
- dev_dbg(&priv->i2c->dev, "%s: invalid delivery_system\n",
- __func__);
+ dev_dbg(&client->dev, "invalid delivery_system\n");
ret = -EINVAL;
goto error;
}
@@ -757,15 +649,13 @@ static int tda10071_set_frontend(struct dvb_frontend *fe)
modulation == TDA10071_MODCOD[i].modulation &&
c->fec_inner == TDA10071_MODCOD[i].fec) {
mode = TDA10071_MODCOD[i].val;
- dev_dbg(&priv->i2c->dev, "%s: mode found=%02x\n",
- __func__, mode);
+ dev_dbg(&client->dev, "mode found=%02x\n", mode);
break;
}
}
if (mode == 0xff) {
- dev_dbg(&priv->i2c->dev, "%s: invalid parameter combination\n",
- __func__);
+ dev_dbg(&client->dev, "invalid parameter combination\n");
ret = -EINVAL;
goto error;
}
@@ -775,11 +665,11 @@ static int tda10071_set_frontend(struct dvb_frontend *fe)
else
div = 4;
- ret = tda10071_wr_reg(priv, 0x81, div);
+ ret = regmap_write(dev->regmap, 0x81, div);
if (ret)
goto error;
- ret = tda10071_wr_reg(priv, 0xe3, div);
+ ret = regmap_write(dev->regmap, 0xe3, div);
if (ret)
goto error;
@@ -799,31 +689,32 @@ static int tda10071_set_frontend(struct dvb_frontend *fe)
cmd.args[13] = 0x00;
cmd.args[14] = 0x00;
cmd.len = 15;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
- priv->delivery_system = c->delivery_system;
+ dev->delivery_system = c->delivery_system;
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_get_frontend(struct dvb_frontend *fe)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
int ret, i;
u8 buf[5], tmp;
- if (!priv->warm || !(priv->fe_status & FE_HAS_LOCK)) {
- ret = -EFAULT;
+ if (!dev->warm || !(dev->fe_status & FE_HAS_LOCK)) {
+ ret = 0;
goto error;
}
- ret = tda10071_rd_regs(priv, 0x30, buf, 5);
+ ret = regmap_bulk_read(dev->regmap, 0x30, buf, 5);
if (ret)
goto error;
@@ -856,7 +747,7 @@ static int tda10071_get_frontend(struct dvb_frontend *fe)
c->frequency = (buf[2] << 16) | (buf[3] << 8) | (buf[4] << 0);
- ret = tda10071_rd_regs(priv, 0x52, buf, 3);
+ ret = regmap_bulk_read(dev->regmap, 0x52, buf, 3);
if (ret)
goto error;
@@ -864,15 +755,18 @@ static int tda10071_get_frontend(struct dvb_frontend *fe)
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_init(struct dvb_frontend *fe)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
+ struct dtv_frontend_properties *c = &fe->dtv_property_cache;
struct tda10071_cmd cmd;
int ret, i, len, remaining, fw_size;
+ unsigned int uitmp;
const struct firmware *fw;
u8 *fw_file = TDA10071_FIRMWARE;
u8 tmp, buf[4];
@@ -890,7 +784,7 @@ static int tda10071_init(struct dvb_frontend *fe)
};
struct tda10071_reg_val_mask tab2[] = {
{ 0xf1, 0x70, 0xff },
- { 0x88, priv->cfg.pll_multiplier, 0x3f },
+ { 0x88, dev->pll_multiplier, 0x3f },
{ 0x89, 0x00, 0x10 },
{ 0x89, 0x10, 0x10 },
{ 0xc0, 0x01, 0x01 },
@@ -934,11 +828,11 @@ static int tda10071_init(struct dvb_frontend *fe)
{ 0xd5, 0x03, 0x03 },
};
- if (priv->warm) {
+ if (dev->warm) {
/* warm state - wake up device from sleep */
for (i = 0; i < ARRAY_SIZE(tab); i++) {
- ret = tda10071_wr_reg_mask(priv, tab[i].reg,
+ ret = tda10071_wr_reg_mask(dev, tab[i].reg,
tab[i].val, tab[i].mask);
if (ret)
goto error;
@@ -948,78 +842,76 @@ static int tda10071_init(struct dvb_frontend *fe)
cmd.args[1] = 0;
cmd.args[2] = 0;
cmd.len = 3;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
} else {
/* cold state - try to download firmware */
/* request the firmware, this will block and timeout */
- ret = request_firmware(&fw, fw_file, priv->i2c->dev.parent);
+ ret = request_firmware(&fw, fw_file, &client->dev);
if (ret) {
- dev_err(&priv->i2c->dev,
- "%s: did not find the firmware file. (%s) Please see linux/Documentation/dvb/ for more details on firmware-problems. (%d)\n",
- KBUILD_MODNAME, fw_file, ret);
+ dev_err(&client->dev,
+ "did not find the firmware file. (%s) Please see linux/Documentation/dvb/ for more details on firmware-problems. (%d)\n",
+ fw_file, ret);
goto error;
}
/* init */
for (i = 0; i < ARRAY_SIZE(tab2); i++) {
- ret = tda10071_wr_reg_mask(priv, tab2[i].reg,
+ ret = tda10071_wr_reg_mask(dev, tab2[i].reg,
tab2[i].val, tab2[i].mask);
if (ret)
goto error_release_firmware;
}
/* download firmware */
- ret = tda10071_wr_reg(priv, 0xe0, 0x7f);
+ ret = regmap_write(dev->regmap, 0xe0, 0x7f);
if (ret)
goto error_release_firmware;
- ret = tda10071_wr_reg(priv, 0xf7, 0x81);
+ ret = regmap_write(dev->regmap, 0xf7, 0x81);
if (ret)
goto error_release_firmware;
- ret = tda10071_wr_reg(priv, 0xf8, 0x00);
+ ret = regmap_write(dev->regmap, 0xf8, 0x00);
if (ret)
goto error_release_firmware;
- ret = tda10071_wr_reg(priv, 0xf9, 0x00);
+ ret = regmap_write(dev->regmap, 0xf9, 0x00);
if (ret)
goto error_release_firmware;
- dev_info(&priv->i2c->dev,
- "%s: found a '%s' in cold state, will try to load a firmware\n",
- KBUILD_MODNAME, tda10071_ops.info.name);
- dev_info(&priv->i2c->dev,
- "%s: downloading firmware from file '%s'\n",
- KBUILD_MODNAME, fw_file);
+ dev_info(&client->dev,
+ "found a '%s' in cold state, will try to load a firmware\n",
+ tda10071_ops.info.name);
+ dev_info(&client->dev, "downloading firmware from file '%s'\n",
+ fw_file);
/* do not download last byte */
fw_size = fw->size - 1;
for (remaining = fw_size; remaining > 0;
- remaining -= (priv->cfg.i2c_wr_max - 1)) {
+ remaining -= (dev->i2c_wr_max - 1)) {
len = remaining;
- if (len > (priv->cfg.i2c_wr_max - 1))
- len = (priv->cfg.i2c_wr_max - 1);
+ if (len > (dev->i2c_wr_max - 1))
+ len = (dev->i2c_wr_max - 1);
- ret = tda10071_wr_regs(priv, 0xfa,
+ ret = regmap_bulk_write(dev->regmap, 0xfa,
(u8 *) &fw->data[fw_size - remaining], len);
if (ret) {
- dev_err(&priv->i2c->dev,
- "%s: firmware download failed=%d\n",
- KBUILD_MODNAME, ret);
+ dev_err(&client->dev,
+ "firmware download failed=%d\n", ret);
goto error_release_firmware;
}
}
release_firmware(fw);
- ret = tda10071_wr_reg(priv, 0xf7, 0x0c);
+ ret = regmap_write(dev->regmap, 0xf7, 0x0c);
if (ret)
goto error;
- ret = tda10071_wr_reg(priv, 0xe0, 0x00);
+ ret = regmap_write(dev->regmap, 0xe0, 0x00);
if (ret)
goto error;
@@ -1027,53 +919,52 @@ static int tda10071_init(struct dvb_frontend *fe)
msleep(250);
/* firmware status */
- ret = tda10071_rd_reg(priv, 0x51, &tmp);
+ ret = regmap_read(dev->regmap, 0x51, &uitmp);
if (ret)
goto error;
- if (tmp) {
- dev_info(&priv->i2c->dev, "%s: firmware did not run\n",
- KBUILD_MODNAME);
+ if (uitmp) {
+ dev_info(&client->dev, "firmware did not run\n");
ret = -EFAULT;
goto error;
} else {
- priv->warm = true;
+ dev->warm = true;
}
cmd.args[0] = CMD_GET_FW_VERSION;
cmd.len = 1;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
- ret = tda10071_rd_regs(priv, cmd.len, buf, 4);
+ ret = regmap_bulk_read(dev->regmap, cmd.len, buf, 4);
if (ret)
goto error;
- dev_info(&priv->i2c->dev, "%s: firmware version %d.%d.%d.%d\n",
- KBUILD_MODNAME, buf[0], buf[1], buf[2], buf[3]);
- dev_info(&priv->i2c->dev, "%s: found a '%s' in warm state\n",
- KBUILD_MODNAME, tda10071_ops.info.name);
+ dev_info(&client->dev, "firmware version %d.%d.%d.%d\n",
+ buf[0], buf[1], buf[2], buf[3]);
+ dev_info(&client->dev, "found a '%s' in warm state\n",
+ tda10071_ops.info.name);
- ret = tda10071_rd_regs(priv, 0x81, buf, 2);
+ ret = regmap_bulk_read(dev->regmap, 0x81, buf, 2);
if (ret)
goto error;
cmd.args[0] = CMD_DEMOD_INIT;
- cmd.args[1] = ((priv->cfg.xtal / 1000) >> 8) & 0xff;
- cmd.args[2] = ((priv->cfg.xtal / 1000) >> 0) & 0xff;
+ cmd.args[1] = ((dev->clk / 1000) >> 8) & 0xff;
+ cmd.args[2] = ((dev->clk / 1000) >> 0) & 0xff;
cmd.args[3] = buf[0];
cmd.args[4] = buf[1];
- cmd.args[5] = priv->cfg.pll_multiplier;
- cmd.args[6] = priv->cfg.spec_inv;
+ cmd.args[5] = dev->pll_multiplier;
+ cmd.args[6] = dev->spec_inv;
cmd.args[7] = 0x00;
cmd.len = 8;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
- if (priv->cfg.tuner_i2c_addr)
- tmp = priv->cfg.tuner_i2c_addr;
+ if (dev->tuner_i2c_addr)
+ tmp = dev->tuner_i2c_addr;
else
tmp = 0x14;
@@ -1093,22 +984,22 @@ static int tda10071_init(struct dvb_frontend *fe)
cmd.args[13] = 0x00;
cmd.args[14] = 0x00;
cmd.len = 15;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
cmd.args[0] = CMD_MPEG_CONFIG;
cmd.args[1] = 0;
- cmd.args[2] = priv->cfg.ts_mode;
+ cmd.args[2] = dev->ts_mode;
cmd.args[3] = 0x00;
cmd.args[4] = 0x04;
cmd.args[5] = 0x00;
cmd.len = 6;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
- ret = tda10071_wr_reg_mask(priv, 0xf0, 0x01, 0x01);
+ ret = regmap_update_bits(dev->regmap, 0xf0, 0x01, 0x01);
if (ret)
goto error;
@@ -1124,7 +1015,7 @@ static int tda10071_init(struct dvb_frontend *fe)
cmd.args[9] = 30;
cmd.args[10] = 30;
cmd.len = 11;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
@@ -1133,22 +1024,33 @@ static int tda10071_init(struct dvb_frontend *fe)
cmd.args[2] = 14;
cmd.args[3] = 14;
cmd.len = 4;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
}
+ /* init stats here in order signal app which stats are supported */
+ c->strength.len = 1;
+ c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->cnr.len = 1;
+ c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->post_bit_error.len = 1;
+ c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+ c->block_error.len = 1;
+ c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
+
return ret;
error_release_firmware:
release_firmware(fw);
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
static int tda10071_sleep(struct dvb_frontend *fe)
{
- struct tda10071_priv *priv = fe->demodulator_priv;
+ struct tda10071_dev *dev = fe->demodulator_priv;
+ struct i2c_client *client = dev->client;
struct tda10071_cmd cmd;
int ret, i;
struct tda10071_reg_val_mask tab[] = {
@@ -1164,7 +1066,7 @@ static int tda10071_sleep(struct dvb_frontend *fe)
{ 0xce, 0x10, 0x10 },
};
- if (!priv->warm) {
+ if (!dev->warm) {
ret = -EFAULT;
goto error;
}
@@ -1173,12 +1075,12 @@ static int tda10071_sleep(struct dvb_frontend *fe)
cmd.args[1] = 0;
cmd.args[2] = 1;
cmd.len = 3;
- ret = tda10071_cmd_execute(priv, &cmd);
+ ret = tda10071_cmd_execute(dev, &cmd);
if (ret)
goto error;
for (i = 0; i < ARRAY_SIZE(tab); i++) {
- ret = tda10071_wr_reg_mask(priv, tab[i].reg, tab[i].val,
+ ret = tda10071_wr_reg_mask(dev, tab[i].reg, tab[i].val,
tab[i].mask);
if (ret)
goto error;
@@ -1186,7 +1088,7 @@ static int tda10071_sleep(struct dvb_frontend *fe)
return ret;
error:
- dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
+ dev_dbg(&client->dev, "failed=%d\n", ret);
return ret;
}
@@ -1200,71 +1102,6 @@ static int tda10071_get_tune_settings(struct dvb_frontend *fe,
return 0;
}
-static void tda10071_release(struct dvb_frontend *fe)
-{
- struct tda10071_priv *priv = fe->demodulator_priv;
- kfree(priv);
-}
-
-struct dvb_frontend *tda10071_attach(const struct tda10071_config *config,
- struct i2c_adapter *i2c)
-{
- int ret;
- struct tda10071_priv *priv = NULL;
- u8 tmp;
-
- /* allocate memory for the internal priv */
- priv = kzalloc(sizeof(struct tda10071_priv), GFP_KERNEL);
- if (priv == NULL) {
- ret = -ENOMEM;
- goto error;
- }
-
- /* make sure demod i2c address is specified */
- if (!config->demod_i2c_addr) {
- dev_dbg(&i2c->dev, "%s: invalid demod i2c address\n", __func__);
- ret = -EINVAL;
- goto error;
- }
-
- /* make sure tuner i2c address is specified */
- if (!config->tuner_i2c_addr) {
- dev_dbg(&i2c->dev, "%s: invalid tuner i2c address\n", __func__);
- ret = -EINVAL;
- goto error;
- }
-
- /* setup the priv */
- priv->i2c = i2c;
- memcpy(&priv->cfg, config, sizeof(struct tda10071_config));
-
- /* chip ID */
- ret = tda10071_rd_reg(priv, 0xff, &tmp);
- if (ret || tmp != 0x0f)
- goto error;
-
- /* chip type */
- ret = tda10071_rd_reg(priv, 0xdd, &tmp);
- if (ret || tmp != 0x00)
- goto error;
-
- /* chip version */
- ret = tda10071_rd_reg(priv, 0xfe, &tmp);
- if (ret || tmp != 0x01)
- goto error;
-
- /* create dvb_frontend */
- memcpy(&priv->fe.ops, &tda10071_ops, sizeof(struct dvb_frontend_ops));
- priv->fe.demodulator_priv = priv;
-
- return &priv->fe;
-error:
- dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
- kfree(priv);
- return NULL;
-}
-EXPORT_SYMBOL(tda10071_attach);
-
static struct dvb_frontend_ops tda10071_ops = {
.delsys = { SYS_DVBS, SYS_DVBS2 },
.info = {
@@ -1289,8 +1126,6 @@ static struct dvb_frontend_ops tda10071_ops = {
FE_CAN_2G_MODULATION
},
- .release = tda10071_release,
-
.get_tune_settings = tda10071_get_tune_settings,
.init = tda10071_init,
@@ -1315,7 +1150,7 @@ static struct dvb_frontend_ops tda10071_ops = {
static struct dvb_frontend *tda10071_get_dvb_frontend(struct i2c_client *client)
{
- struct tda10071_priv *dev = i2c_get_clientdata(client);
+ struct tda10071_dev *dev = i2c_get_clientdata(client);
dev_dbg(&client->dev, "\n");
@@ -1325,10 +1160,14 @@ static struct dvb_frontend *tda10071_get_dvb_frontend(struct i2c_client *client)
static int tda10071_probe(struct i2c_client *client,
const struct i2c_device_id *id)
{
- struct tda10071_priv *dev;
+ struct tda10071_dev *dev;
struct tda10071_platform_data *pdata = client->dev.platform_data;
int ret;
- u8 u8tmp;
+ unsigned int uitmp;
+ static const struct regmap_config regmap_config = {
+ .reg_bits = 8,
+ .val_bits = 8,
+ };
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev) {
@@ -1337,45 +1176,48 @@ static int tda10071_probe(struct i2c_client *client,
}
dev->client = client;
- dev->i2c = client->adapter;
- dev->cfg.demod_i2c_addr = client->addr;
- dev->cfg.i2c_wr_max = pdata->i2c_wr_max;
- dev->cfg.ts_mode = pdata->ts_mode;
- dev->cfg.spec_inv = pdata->spec_inv;
- dev->cfg.xtal = pdata->clk;
- dev->cfg.pll_multiplier = pdata->pll_multiplier;
- dev->cfg.tuner_i2c_addr = pdata->tuner_i2c_addr;
+ mutex_init(&dev->cmd_execute_mutex);
+ dev->clk = pdata->clk;
+ dev->i2c_wr_max = pdata->i2c_wr_max;
+ dev->ts_mode = pdata->ts_mode;
+ dev->spec_inv = pdata->spec_inv;
+ dev->pll_multiplier = pdata->pll_multiplier;
+ dev->tuner_i2c_addr = pdata->tuner_i2c_addr;
+ dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
+ if (IS_ERR(dev->regmap)) {
+ ret = PTR_ERR(dev->regmap);
+ goto err_kfree;
+ }
/* chip ID */
- ret = tda10071_rd_reg(dev, 0xff, &u8tmp);
+ ret = regmap_read(dev->regmap, 0xff, &uitmp);
if (ret)
goto err_kfree;
- if (u8tmp != 0x0f) {
+ if (uitmp != 0x0f) {
ret = -ENODEV;
goto err_kfree;
}
/* chip type */
- ret = tda10071_rd_reg(dev, 0xdd, &u8tmp);
+ ret = regmap_read(dev->regmap, 0xdd, &uitmp);
if (ret)
goto err_kfree;
- if (u8tmp != 0x00) {
+ if (uitmp != 0x00) {
ret = -ENODEV;
goto err_kfree;
}
/* chip version */
- ret = tda10071_rd_reg(dev, 0xfe, &u8tmp);
+ ret = regmap_read(dev->regmap, 0xfe, &uitmp);
if (ret)
goto err_kfree;
- if (u8tmp != 0x01) {
+ if (uitmp != 0x01) {
ret = -ENODEV;
goto err_kfree;
}
/* create dvb_frontend */
memcpy(&dev->fe.ops, &tda10071_ops, sizeof(struct dvb_frontend_ops));
- dev->fe.ops.release = NULL;
dev->fe.demodulator_priv = dev;
i2c_set_clientdata(client, dev);
@@ -1409,7 +1251,6 @@ MODULE_DEVICE_TABLE(i2c, tda10071_id_table);
static struct i2c_driver tda10071_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "tda10071",
.suppress_bind_attrs = true,
},
diff --git a/drivers/media/dvb-frontends/tda10071.h b/drivers/media/dvb-frontends/tda10071.h
index 0ffbfa5b2dfb..8f184026ee11 100644
--- a/drivers/media/dvb-frontends/tda10071.h
+++ b/drivers/media/dvb-frontends/tda10071.h
@@ -21,12 +21,11 @@
#ifndef TDA10071_H
#define TDA10071_H
-#include <linux/kconfig.h>
#include <linux/dvb/frontend.h>
/*
* I2C address
- * 0x55,
+ * 0x05, 0x55,
*/
/**
@@ -53,64 +52,4 @@ struct tda10071_platform_data {
struct dvb_frontend* (*get_dvb_frontend)(struct i2c_client *);
};
-struct tda10071_config {
- /* Demodulator I2C address.
- * Default: none, must set
- * Values: 0x55,
- */
- u8 demod_i2c_addr;
-
- /* Tuner I2C address.
- * Default: none, must set
- * Values: 0x14, 0x54, ...
- */
- u8 tuner_i2c_addr;
-
- /* Max bytes I2C provider can write at once.
- * Note: Buffer is taken from the stack currently!
- * Default: none, must set
- * Values:
- */
- u16 i2c_wr_max;
-
- /* TS output mode.
- * Default: TDA10071_TS_SERIAL
- * Values:
- */
-#define TDA10071_TS_SERIAL 0
-#define TDA10071_TS_PARALLEL 1
- u8 ts_mode;
-
- /* Input spectrum inversion.
- * Default: 0
- * Values: 0, 1
- */
- bool spec_inv;
-
- /* Xtal frequency Hz
- * Default: none, must set
- * Values:
- */
- u32 xtal;
-
- /* PLL multiplier.
- * Default: none, must set
- * Values:
- */
- u8 pll_multiplier;
-};
-
-
-#if IS_REACHABLE(CONFIG_DVB_TDA10071)
-extern struct dvb_frontend *tda10071_attach(
- const struct tda10071_config *config, struct i2c_adapter *i2c);
-#else
-static inline struct dvb_frontend *tda10071_attach(
- const struct tda10071_config *config, struct i2c_adapter *i2c)
-{
- dev_warn(&i2c->dev, "%s: driver disabled by Kconfig\n", __func__);
- return NULL;
-}
-#endif
-
#endif /* TDA10071_H */
diff --git a/drivers/media/dvb-frontends/tda10071_priv.h b/drivers/media/dvb-frontends/tda10071_priv.h
index 54d7c713eec8..b9c3601802ba 100644
--- a/drivers/media/dvb-frontends/tda10071_priv.h
+++ b/drivers/media/dvb-frontends/tda10071_priv.h
@@ -24,19 +24,27 @@
#include "dvb_frontend.h"
#include "tda10071.h"
#include <linux/firmware.h>
+#include <linux/regmap.h>
-struct tda10071_priv {
- struct i2c_adapter *i2c;
+struct tda10071_dev {
struct dvb_frontend fe;
struct i2c_client *client;
- struct tda10071_config cfg;
+ struct regmap *regmap;
+ struct mutex cmd_execute_mutex;
+ u32 clk;
+ u16 i2c_wr_max;
+ u8 ts_mode;
+ bool spec_inv;
+ u8 pll_multiplier;
+ u8 tuner_i2c_addr;
- u8 meas_count[2];
- u32 ber;
- u32 ucb;
+ u8 meas_count;
+ u32 dvbv3_ber;
enum fe_status fe_status;
enum fe_delivery_system delivery_system;
bool warm; /* FW running */
+ u64 post_bit_error;
+ u64 block_error;
};
static struct tda10071_modcod {
diff --git a/drivers/media/dvb-frontends/ts2020.c b/drivers/media/dvb-frontends/ts2020.c
index f61b143a0052..7979e5d6498b 100644
--- a/drivers/media/dvb-frontends/ts2020.c
+++ b/drivers/media/dvb-frontends/ts2020.c
@@ -726,7 +726,6 @@ MODULE_DEVICE_TABLE(i2c, ts2020_id_table);
static struct i2c_driver ts2020_driver = {
.driver = {
- .owner = THIS_MODULE,
.name = "ts2020",
},
.probe = ts2020_probe,

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