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authorIcenowy Zheng <icenowy@aosc.io>2017-09-28 17:33:49 +0800
committerKishon Vijay Abraham I <kishon@ti.com>2017-10-23 11:19:25 +0530
commita06173badf697b1aad51d9fc280b520b38715c95 (patch)
tree08515fd17df189509711f200482edb0cd8c11e95 /drivers/phy
parente023b1fb5286e23c224f2ae312831a4fce258c02 (diff)
phy: sun4i-usb: enable PHY0 dual route for V3s SoC
Allwinner V3s SoC also features the dual route of the first USB PHY. Enable it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/allwinner/phy-sun4i-usb.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c
index 1161e11fb3cf..a2fbc7b00b9a 100644
--- a/drivers/phy/allwinner/phy-sun4i-usb.c
+++ b/drivers/phy/allwinner/phy-sun4i-usb.c
@@ -926,6 +926,7 @@ static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
.phyctl_offset = REG_PHYCTL_A33,
.dedicated_clocks = true,
.enable_pmu_unk1 = true,
+ .phy0_dual_route = true,
};
static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {

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