path: root/drivers/rpmsg/qcom_glink_smem.c
diff options
authorBjorn Andersson <bjorn.andersson@linaro.org>2017-12-14 12:15:46 -0800
committerBjorn Andersson <bjorn.andersson@linaro.org>2017-12-18 21:47:43 -0800
commit9d32497361ff89d2fc8306407de6f04b2bfb2836 (patch)
treecfa4a770525da901bf3080892e80593df27b94f1 /drivers/rpmsg/qcom_glink_smem.c
parented608eb0be578472ba1b23bca92f7dec61b24053 (diff)
rpmsg: glink: smem: Ensure ordering during tx
Ensure the ordering of the fifo write and the update of the write index, so that the index is not updated before the data has landed in the fifo. Acked-By: Chris Lew <clew@codeaurora.org> Reported-by: Arun Kumar Neelakantam <aneela@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'drivers/rpmsg/qcom_glink_smem.c')
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c
index 057528e23d3a..892f2b92a4d8 100644
--- a/drivers/rpmsg/qcom_glink_smem.c
+++ b/drivers/rpmsg/qcom_glink_smem.c
@@ -183,6 +183,9 @@ static void glink_smem_tx_write(struct qcom_glink_pipe *glink_pipe,
if (head >= pipe->native.length)
head -= pipe->native.length;
+ /* Ensure ordering of fifo and head update */
+ wmb();
*pipe->head = cpu_to_le32(head);

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