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authorThierry Reding <treding@nvidia.com>2017-06-26 17:25:24 +0200
committerThierry Reding <treding@nvidia.com>2017-12-13 12:43:31 +0100
commit75c15b90e42373a3c651d53e6e55239b0f03777d (patch)
tree4dd4800a544924c5448958aa7abbc2299a981bfb /drivers/soc
parentda943840bcd2b490788d73c60ac4368fb7fc7229 (diff)
soc/tegra: fuse: Add Tegra186 chip ID support
The register region containing chip ID information has been relocated in Tegra186 and changed in backwards-incompatible ways. Add a compatible string to allow the driver to make the distinction. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc')
-rw-r--r--drivers/soc/tegra/fuse/tegra-apbmisc.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c
index b1f8b23277b9..e5a4d8f98b10 100644
--- a/drivers/soc/tegra/fuse/tegra-apbmisc.c
+++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c
@@ -74,6 +74,7 @@ u32 tegra_read_ram_code(void)
static const struct of_device_id apbmisc_match[] __initconst = {
{ .compatible = "nvidia,tegra20-apbmisc", },
+ { .compatible = "nvidia,tegra186-misc", },
{},
};

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