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authorRalf Ramsauer <ralf.ramsauer@oth-regensburg.de>2017-10-05 13:22:36 +0200
committerMark Brown <broonie@kernel.org>2017-10-09 10:16:38 +0100
commit979a9afe399f7c75e1be9f235fa8bf1a90d2e77d (patch)
tree5e644f46bdb07654d80963a809fc76b5f16ed9b3 /drivers/spi/spi-tegra114.c
parent2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff)
spi: tegra114: correct register name in definition
According to "Tegra K1 Processor Technical Reference Manual" (p. 2448), bit 20 of SPI_COMMAND1 is called CS_SW_VAL and not CS_SS_VAL. Signed-off-by: Ralf Ramsauer <ralf.ramsauer@oth-regensburg.de> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-tegra114.c')
-rw-r--r--drivers/spi/spi-tegra114.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 44550182a4a3..a76acedd7e2f 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -50,7 +50,7 @@
#define SPI_IDLE_SDA_PULL_LOW (2 << 18)
#define SPI_IDLE_SDA_PULL_HIGH (3 << 18)
#define SPI_IDLE_SDA_MASK (3 << 18)
-#define SPI_CS_SS_VAL (1 << 20)
+#define SPI_CS_SW_VAL (1 << 20)
#define SPI_CS_SW_HW (1 << 21)
/* SPI_CS_POL_INACTIVE bits are default high */
/* n from 0 to 3 */
@@ -705,9 +705,9 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,
command1 |= SPI_CS_SW_HW;
if (spi->mode & SPI_CS_HIGH)
- command1 |= SPI_CS_SS_VAL;
+ command1 |= SPI_CS_SW_VAL;
else
- command1 &= ~SPI_CS_SS_VAL;
+ command1 &= ~SPI_CS_SW_VAL;
tegra_spi_writel(tspi, 0, SPI_COMMAND2);
} else {

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