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authorMaxime Chevallier <maxime.chevallier@smile.fr>2018-01-17 17:15:25 +0100
committerMark Brown <broonie@kernel.org>2018-01-18 10:59:12 +0000
commit44a5f423e70374e5b42cecd85e78f2d79334e0f2 (patch)
treeac17c518f5357f051350af2833675af9cb913182 /drivers/spi
parent4fbd8d194f06c8a3fd2af1ce560ddb31f7ec8323 (diff)
spi: a3700: Clear DATA_OUT when performing a read
When performing a read using FIFO mode, the spi controller shifts out the last 2 bytes that were written in a previous transfer on MOSI. This undocumented behaviour can cause devices to misinterpret the transfer, so we explicitly clear the WFIFO before each read. This behaviour was noticed on EspressoBin. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-armada-3700.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/spi/spi-armada-3700.c b/drivers/spi/spi-armada-3700.c
index 77fe55ce790c..4857b0119556 100644
--- a/drivers/spi/spi-armada-3700.c
+++ b/drivers/spi/spi-armada-3700.c
@@ -607,6 +607,11 @@ static int a3700_spi_transfer_one(struct spi_master *master,
a3700_spi_header_set(a3700_spi);
if (xfer->rx_buf) {
+ /* Clear WFIFO, since it's last 2 bytes are shifted out during
+ * a read operation
+ */
+ spireg_write(a3700_spi, A3700_SPI_DATA_OUT_REG, 0);
+
/* Set read data length */
spireg_write(a3700_spi, A3700_SPI_IF_DIN_CNT_REG,
a3700_spi->buf_len);

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