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authorMaxime Chevallier <maxime.chevallier@smile.fr>2018-01-17 17:15:26 +0100
committerMark Brown <broonie@kernel.org>2018-01-18 10:59:18 +0000
commitabf3a49e50967bd67cff67f289690f76436f461f (patch)
treedfd0f18eefb8fe3708b235b528f23bce58504585 /drivers/spi
parent44a5f423e70374e5b42cecd85e78f2d79334e0f2 (diff)
spi: a3700: Set frequency limits at startup
Armada 3700 SPI controller has an internal clock divider which can divide the parent clock frequency by up to 30. This patch sets the limits in the spi_controller fields so that we can detect when a non-supported frequency is requested by a device for a transfer. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi')
-rw-r--r--drivers/spi/spi-armada-3700.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/spi/spi-armada-3700.c b/drivers/spi/spi-armada-3700.c
index 4857b0119556..07f227e3c834 100644
--- a/drivers/spi/spi-armada-3700.c
+++ b/drivers/spi/spi-armada-3700.c
@@ -27,6 +27,8 @@
#define DRIVER_NAME "armada_3700_spi"
+#define A3700_SPI_MAX_SPEED_HZ 100000000
+#define A3700_SPI_MAX_PRESCALE 30
#define A3700_SPI_TIMEOUT 10
/* SPI Register Offest */
@@ -815,6 +817,11 @@ static int a3700_spi_probe(struct platform_device *pdev)
goto error;
}
+ master->max_speed_hz = min_t(unsigned long, A3700_SPI_MAX_SPEED_HZ,
+ clk_get_rate(spi->clk));
+ master->min_speed_hz = DIV_ROUND_UP(clk_get_rate(spi->clk),
+ A3700_SPI_MAX_PRESCALE);
+
ret = a3700_spi_init(spi);
if (ret)
goto error_clk;

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