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authorGuenter Roeck <linux@roeck-us.net>2017-12-24 13:04:07 -0800
committerWim Van Sebroeck <wim@iguana.be>2018-01-21 12:56:34 +0100
commitf541c09ebfc61697b586b38c9ebaf4b70defb278 (patch)
treeff7340c93e3cf48ab84d295811a187b8d558deb0 /drivers/watchdog
parent2b750cffe1ed05c9001d9524b5815e1f50461a44 (diff)
watchdog: sp5100_tco: Fix watchdog disable bit
According to all published information, the watchdog disable bit for SB800 compatible controllers is bit 1 of PM register 0x48, not bit 2. For the most part that doesn't matter in practice, since the bit has to be cleared to enable watchdog address decoding, which is the default setting, but it still needs to be fixed. Cc: Zoltán Böszörményi <zboszor@pr.hu> Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
Diffstat (limited to 'drivers/watchdog')
-rw-r--r--drivers/watchdog/sp5100_tco.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/watchdog/sp5100_tco.h b/drivers/watchdog/sp5100_tco.h
index f495fe03887a..2622cfe23dc1 100644
--- a/drivers/watchdog/sp5100_tco.h
+++ b/drivers/watchdog/sp5100_tco.h
@@ -52,7 +52,7 @@
#define SB800_PM_WATCHDOG_CONFIG 0x4C
#define SB800_PCI_WATCHDOG_DECODE_EN (1 << 0)
-#define SB800_PM_WATCHDOG_DISABLE (1 << 2)
+#define SB800_PM_WATCHDOG_DISABLE (1 << 1)
#define SB800_PM_WATCHDOG_SECOND_RES (3 << 0)
#define SB800_ACPI_MMIO_DECODE_EN (1 << 0)
#define SB800_ACPI_MMIO_SEL (1 << 1)

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