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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2015-11-02 00:50:37 +0100
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2015-11-02 00:50:37 +0100
commit62839e2d018117f2474321b38709dd7e80796e52 (patch)
tree6bafe15d957658416fc98c3a2f3dc02b4d6f842a /include/acpi
parent5b9ddd0d7427c16e5d8779e77ba89c2bc5a7324c (diff)
parent4219853aef645d29b122daa8a8b7bd792f1cc7c9 (diff)
Merge branch 'acpi-processor'
* acpi-processor: ACPI / CPPC: Fix potential memory leak ACPI / CPPC: signedness bug in register_pcc_channel() ACPI: Allow selection of the ACPI processor driver for ARM64 CPPC: Probe for CPPC tables for each ACPI Processor object ACPI: Add weak routines for ACPI CPU Hotplug ACPI / CPPC: Add a CPUFreq driver for use with CPPC ACPI: Introduce CPU performance controls using CPPC
Diffstat (limited to 'include/acpi')
-rw-r--r--include/acpi/cppc_acpi.h138
-rw-r--r--include/acpi/processor.h14
2 files changed, 152 insertions, 0 deletions
diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
new file mode 100644
index 000000000000..717a29810473
--- /dev/null
+++ b/include/acpi/cppc_acpi.h
@@ -0,0 +1,138 @@
+/*
+ * CPPC (Collaborative Processor Performance Control) methods used
+ * by CPUfreq drivers.
+ *
+ * (C) Copyright 2014, 2015 Linaro Ltd.
+ * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#ifndef _CPPC_ACPI_H
+#define _CPPC_ACPI_H
+
+#include <linux/acpi.h>
+#include <linux/mailbox_controller.h>
+#include <linux/mailbox_client.h>
+#include <linux/types.h>
+
+#include <acpi/processor.h>
+
+/* Only support CPPCv2 for now. */
+#define CPPC_NUM_ENT 21
+#define CPPC_REV 2
+
+#define PCC_CMD_COMPLETE 1
+#define MAX_CPC_REG_ENT 19
+
+/* CPPC specific PCC commands. */
+#define CMD_READ 0
+#define CMD_WRITE 1
+
+/* Each register has the folowing format. */
+struct cpc_reg {
+ u8 descriptor;
+ u16 length;
+ u8 space_id;
+ u8 bit_width;
+ u8 bit_offset;
+ u8 access_width;
+ u64 __iomem address;
+} __packed;
+
+/*
+ * Each entry in the CPC table is either
+ * of type ACPI_TYPE_BUFFER or
+ * ACPI_TYPE_INTEGER.
+ */
+struct cpc_register_resource {
+ acpi_object_type type;
+ union {
+ struct cpc_reg reg;
+ u64 int_value;
+ } cpc_entry;
+};
+
+/* Container to hold the CPC details for each CPU */
+struct cpc_desc {
+ int num_entries;
+ int version;
+ int cpu_id;
+ struct cpc_register_resource cpc_regs[MAX_CPC_REG_ENT];
+ struct acpi_psd_package domain_info;
+};
+
+/* These are indexes into the per-cpu cpc_regs[]. Order is important. */
+enum cppc_regs {
+ HIGHEST_PERF,
+ NOMINAL_PERF,
+ LOW_NON_LINEAR_PERF,
+ LOWEST_PERF,
+ GUARANTEED_PERF,
+ DESIRED_PERF,
+ MIN_PERF,
+ MAX_PERF,
+ PERF_REDUC_TOLERANCE,
+ TIME_WINDOW,
+ CTR_WRAP_TIME,
+ REFERENCE_CTR,
+ DELIVERED_CTR,
+ PERF_LIMITED,
+ ENABLE,
+ AUTO_SEL_ENABLE,
+ AUTO_ACT_WINDOW,
+ ENERGY_PERF,
+ REFERENCE_PERF,
+};
+
+/*
+ * Categorization of registers as described
+ * in the ACPI v.5.1 spec.
+ * XXX: Only filling up ones which are used by governors
+ * today.
+ */
+struct cppc_perf_caps {
+ u32 highest_perf;
+ u32 nominal_perf;
+ u32 reference_perf;
+ u32 lowest_perf;
+};
+
+struct cppc_perf_ctrls {
+ u32 max_perf;
+ u32 min_perf;
+ u32 desired_perf;
+};
+
+struct cppc_perf_fb_ctrs {
+ u64 reference;
+ u64 prev_reference;
+ u64 delivered;
+ u64 prev_delivered;
+};
+
+/* Per CPU container for runtime CPPC management. */
+struct cpudata {
+ int cpu;
+ struct cppc_perf_caps perf_caps;
+ struct cppc_perf_ctrls perf_ctrls;
+ struct cppc_perf_fb_ctrs perf_fb_ctrs;
+ struct cpufreq_policy *cur_policy;
+ unsigned int shared_type;
+ cpumask_var_t shared_cpu_map;
+};
+
+extern int cppc_get_perf_ctrs(int cpu, struct cppc_perf_fb_ctrs *perf_fb_ctrs);
+extern int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls);
+extern int cppc_get_perf_caps(int cpu, struct cppc_perf_caps *caps);
+extern int acpi_get_psd_map(struct cpudata **);
+
+/* Methods to interact with the PCC mailbox controller. */
+extern struct mbox_chan *
+ pcc_mbox_request_channel(struct mbox_client *, unsigned int);
+extern int mbox_send_message(struct mbox_chan *chan, void *mssg);
+
+#endif /* _CPPC_ACPI_H*/
diff --git a/include/acpi/processor.h b/include/acpi/processor.h
index ff5f135f16b1..07fb100bcc68 100644
--- a/include/acpi/processor.h
+++ b/include/acpi/processor.h
@@ -311,6 +311,20 @@ phys_cpuid_t acpi_get_phys_id(acpi_handle, int type, u32 acpi_id);
int acpi_map_cpuid(phys_cpuid_t phys_id, u32 acpi_id);
int acpi_get_cpuid(acpi_handle, int type, u32 acpi_id);
+#ifdef CONFIG_ACPI_CPPC_LIB
+extern int acpi_cppc_processor_probe(struct acpi_processor *pr);
+extern void acpi_cppc_processor_exit(struct acpi_processor *pr);
+#else
+static inline int acpi_cppc_processor_probe(struct acpi_processor *pr)
+{
+ return 0;
+}
+static inline void acpi_cppc_processor_exit(struct acpi_processor *pr)
+{
+ return;
+}
+#endif /* CONFIG_ACPI_CPPC_LIB */
+
/* in processor_pdc.c */
void acpi_processor_set_pdc(acpi_handle handle);

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