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authorNishanth Menon <nm@ti.com>2014-05-16 05:46:00 -0500
committerTero Kristo <t-kristo@ti.com>2014-06-06 20:33:40 +0300
commit7e148070001ae82df08966199580a29b934e3bf3 (patch)
treeb15538c8e4192a723fef5ba6b81d4bde6fbd26a2 /include/dt-bindings/clk
parentb4be018921879ba7452379af8fb7320833a12bd4 (diff)
ARM: dts: OMAP5/DRA7: use omap5-mpu-dpll-clock capable of dealing with higher frequencies
OMAP5432, DRA75x and DRA72x have MPU DPLLs that need Duty Cycle Correction(DCC) to operate safely at frequencies >= 1.4GHz. Switch to "ti,omap5-mpu-dpll-clock" compatible property which provides this support. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'include/dt-bindings/clk')
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