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authorSanchayan Maity <maitysanchayan@gmail.com>2015-09-07 13:51:35 +0530
committerShawn Guo <shawnguo@kernel.org>2015-09-22 18:02:40 -0700
commit0753f56e411a5e216c9899c21e54bd11dde17313 (patch)
tree8368e4b4bb79fbb1b764d6c614c7de1d30eee513 /include/dt-bindings
parent8efaf5ed4d442068a1b76f218c0a90e6a5989f11 (diff)
clk: clk-vf610: Add clock for Vybrid OCOTP controller
Add clock support for Vybrid On-Chip One Time Programmable (OCOTP) controller. While the OCOTP block does not require explicit clock gating, for programming the OCOTP timing register the clock rate of ipg clock is required for timing calculations related to fuse and shadow register read sequence. We explicitly specify the ipg clock for OCOTP as a result. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/vf610-clock.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/vf610-clock.h b/include/dt-bindings/clock/vf610-clock.h
index d19763439472..56c16aaea112 100644
--- a/include/dt-bindings/clock/vf610-clock.h
+++ b/include/dt-bindings/clock/vf610-clock.h
@@ -194,6 +194,7 @@
#define VF610_PLL7_BYPASS 181
#define VF610_CLK_SNVS 182
#define VF610_CLK_DAP 183
-#define VF610_CLK_END 184
+#define VF610_CLK_OCOTP 184
+#define VF610_CLK_END 185
#endif /* __DT_BINDINGS_CLOCK_VF610_H */

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