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authorDmitry Osipenko <digetx@gmail.com>2015-01-15 13:58:57 +0300
committerThierry Reding <treding@nvidia.com>2015-05-04 12:58:19 +0200
commit4d48edb3c3e1234d6b3fcdfb9ac24d7c6de449cb (patch)
treeaee2e4b362f43aa7cc68996565dd6a726b42f59b /include/soc
parent039aa4d68067161a7bd63aac9c2abc610aafab22 (diff)
ARM: tegra20: Store CPU "resettable" status in IRAM
Commit 7232398abc6a ("ARM: tegra: Convert PMC to a driver") changed tegra_resume() location storing from late to early and, as a result, broke suspend on Tegra20. PMC scratch register 41 is used by tegra LP1 resume code for retrieving stored physical memory address of common resume function and in the same time used by tegra20_cpu_shutdown() (shared by Tegra20 cpuidle driver and platform SMP code), which is storing CPU1 "resettable" status. It implies strict order of scratch register usage, otherwise resume function address is lost on Tegra20 after disabling non-boot CPU's on suspend. Fix it by storing "resettable" status in IRAM instead of PMC scratch register. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Fixes: 7232398abc6a (ARM: tegra: Convert PMC to a driver) Cc: <stable@vger.kernel.org> # v3.17+ Signed-off-by: Thierry Reding <treding@nvidia.com>
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