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authorPeter De Schrijver <pdeschrijver@nvidia.com>2014-06-12 18:36:37 +0300
committerThierry Reding <treding@nvidia.com>2014-07-17 14:36:01 +0200
commit783c8f4c84451bc444e314a71b447239c6ef6fd9 (patch)
treeccf8ed545ac850e06d3e781a99769bd0ea43c597 /include/soc
parent35874f3617b38e0c1f72163407c41d554a8f5939 (diff)
soc/tegra: Add efuse driver for Tegra
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124. This replaces functionality previously provided in arch/arm/mach-tegra, which is removed in this patch. While at it, move the only user of the global tegra_revision variable over to tegra_sku_info.revision and export tegra_fuse_readl() to allow drivers to read calibration fuses. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/soc')
-rw-r--r--include/soc/tegra/fuse.h20
1 files changed, 19 insertions, 1 deletions
diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h
index 822eb348e107..51ac804deba5 100644
--- a/include/soc/tegra/fuse.h
+++ b/include/soc/tegra/fuse.h
@@ -22,6 +22,9 @@
#define TEGRA114 0x35
#define TEGRA124 0x40
+#define TEGRA_FUSE_SKU_CALIB_0 0xf0
+#define TEGRA30_FUSE_SATA_CALIB 0x124
+
#ifndef __ASSEMBLY__
u32 tegra_read_chipid(void);
@@ -37,11 +40,26 @@ enum tegra_revision {
TEGRA_REVISION_MAX,
};
+struct tegra_sku_info {
+ int sku_id;
+ int cpu_process_id;
+ int cpu_speedo_id;
+ int cpu_speedo_value;
+ int cpu_iddq_value;
+ int core_process_id;
+ int soc_speedo_id;
+ int gpu_speedo_id;
+ int gpu_process_id;
+ int gpu_speedo_value;
+ enum tegra_revision revision;
+};
+
u32 tegra_read_straps(void);
u32 tegra_read_chipid(void);
void tegra_init_fuse(void);
+int tegra_fuse_readl(unsigned long offset, u32 *value);
-extern enum tegra_revision tegra_revision;
+extern struct tegra_sku_info tegra_sku_info;
#if defined(CONFIG_TEGRA20_APB_DMA)
int tegra_apb_readl_using_dma(unsigned long offset, u32 *value);

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