path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2018-02-07Merge tag 'mips_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan...Linus Torvalds5-18/+566
2018-02-01Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds105-5767/+11752
2018-02-01Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/ar...Linus Torvalds14-1052/+2053
2018-01-26Merge branches 'clk-aspeed', 'clk-lock-UP', 'clk-mediatek' and 'clk-allwinner...Stephen Boyd15-104/+929
2018-01-26Merge branches 'clk-remove-asm-clkdev', 'clk-debugfs-fixes', 'clk-renesas' an...Stephen Boyd21-163/+1276
2018-01-26Merge branch 'clk-divider-container' into clk-nextStephen Boyd6-9/+9
2018-01-26Merge branches 'clk-iproc', 'clk-mvebu' and 'clk-qcom-a53' into clk-nextStephen Boyd10-102/+737
2018-01-26Merge branches 'clk-at91', 'clk-imx7ulp', 'clk-axigen', 'clk-si5351' and 'clk...Stephen Boyd7-41/+146
2018-01-26Merge branches 'clk-spreadtrum', 'clk-mvebu-dvfs', 'clk-qoriq', 'clk-imx' and...Stephen Boyd29-81/+7213
2018-01-26Merge branches 'clk-qcom-alpha-pll', 'clk-check-ops-ptr', 'clk-protect-rate' ...Stephen Boyd15-5241/+918
2018-01-26clk: aspeed: Handle inverse polarity of USB port 1 clock gateBenjamin Herrenschmidt1-3/+12
2018-01-26clk: aspeed: Fix return value check in aspeed_cc_init()Wei Yongjun1-1/+1
2018-01-26clk: aspeed: Add reset controllerJoel Stanley1-1/+81
2018-01-26clk: aspeed: Register gated clocksJoel Stanley1-0/+130
2018-01-26clk: aspeed: Add platform driver and register PLLsJoel Stanley1-0/+130
2018-01-26clk: aspeed: Register core clocksJoel Stanley1-0/+177
2018-01-26clk: Add clock driver for ASPEED BMC SoCsJoel Stanley3-0/+154
2018-01-18clk: Add Ingenic jz4770 CGU driverPaul Cercueil2-0/+484
2018-01-18clk: ingenic: Add code to enable/disable PLLsPaul Cercueil1-15/+74
2018-01-18clk: ingenic: support PLLs with no bypass bitPaul Cercueil2-1/+4
2018-01-18clk: ingenic: Fix recalc_rate for clocks with fixed dividerPaul Cercueil1-0/+2
2018-01-18clk: ingenic: Use const pointer to clk_ops in structPaul Cercueil2-2/+2
2018-01-10clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being builtSean Wang3-9/+2
2018-01-10clk: fix reentrancy of clk_enable() on UP systemsDavid Lechner1-1/+9
2018-01-10clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()weiyongjun (A)1-0/+2
2018-01-10clk: Simplify debugfs registrationStephen Boyd1-6/+2
2018-01-10clk: Fix debugfs_create_*() usageGeert Uytterhoeven1-19/+17
2018-01-10clk: Show symbolic clock flags in debugfsGeert Uytterhoeven1-2/+55
2018-01-05clk: renesas: r8a7796: Add FDP clockABE Hiroshige1-0/+1
2018-01-04clk: Move __clk_{get,put}() into private clk.h APIStephen Boyd1-0/+4
2018-01-04clk: sunxi: Use CLK_IS_CRITICAL flag for critical clksStephen Boyd6-47/+44
2018-01-03clk: Improve flags doc for of_clk_detect_critical()Geert Uytterhoeven1-1/+1
2018-01-03clk: sunxi-ng: a83t: Add M divider to TCON1 clockJernej Škrabec1-2/+2
2018-01-02Merge tag 'meson-clk-for-v4.16-3' of git://github.com/BayLibre/clk-meson into...Stephen Boyd1-1/+1
2018-01-02clk: Prepare to remove asm-generic/clkdev.hStephen Boyd1-1/+1
2018-01-02clk: qcom: Add APCS clock controller supportGeorgi Djakov3-0/+150
2018-01-02clk: qcom: Add regmap mux-div clocks supportGeorgi Djakov3-0/+276
2018-01-02clk: qcom: Add A53 PLL supportGeorgi Djakov3-0/+118
2017-12-29clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCUIcenowy Zheng1-3/+3
2017-12-29clk: sunxi-ng: add support for Allwinner H3 DE2 CCUIcenowy Zheng1-0/+47
2017-12-28clk: divider: fix incorrect usage of container_ofJerome Brunet5-8/+7
2017-12-28clk: mvebu: armada-37xx-periph: Use PTR_ERR_OR_ZERO()Gomonovych, Vasyl1-4/+1
2017-12-28clk: iproc: Minor tidy up of iproc pll data structuresLori Hikichi1-47/+36
2017-12-28clk: iproc: Allow plls to do minor rate changes without resetLori Hikichi1-0/+47
2017-12-28clk: iproc: Fix error in the pll post divider rate calculationLori Hikichi1-16/+17
2017-12-28clk: iproc: Allow iproc pll to runtime calculate vco parametersLori Hikichi3-35/+92
2017-12-28clk: si5351: _si5351_clkout_reset_pll() can be staticWu Fengguang1-1/+1
2017-12-28clk: pxa: unbreak lookup of CLK_POUTIgor Grinberg1-1/+5
2017-12-28clk: meson-axg: make local symbol axg_gp0_params_table staticweiyongjun (A)1-1/+1
2017-12-28clk: meson-axg: fix return value check in axg_clkc_probe()weiyongjun (A)1-1/+1

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