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path: root/drivers/clk/mediatek
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2018-01-10clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being builtSean Wang3-9/+2
2017-12-26clk: mediatek: Fix all warnings for missing struct clk_onecell_dataSean Wang1-0/+1
2017-12-21clk: mediatek: group drivers under indpendent menuSean Wang1-46/+50
2017-11-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds17-4/+3520
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-11-02clk: mediatek: add clock support for MT7622 SoCSean Wang6-0/+1334
2017-11-02clk: mediatek: add the option for determining PLL source clockChen Zhong2-1/+5
2017-11-02clk: mediatek: mark mtk_infrasys_init_early __initArnd Bergmann1-1/+1
2017-11-02clk: mediatek: Add MT2712 clock supportweiyi.lu@mediatek.com12-2/+2180
2017-07-21clk: Convert to using %pOF instead of full_nameRob Herring3-3/+3
2017-07-17clk: mediatek: fixed static checker warning in clk_cpumux_get_parent callSean Wang1-4/+0
2017-06-19clk: mediatek: export cpu multiplexer clock for MT8173 SoCsSean Wang1-0/+23
2017-06-19clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCsSean Wang1-0/+8
2017-06-19clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't workSean Wang3-1/+151
2017-04-21clk: mediatek: add mt2701 ethernet resetJohn Crispin1-0/+2
2017-04-19clk: mediatek: add clk support for MT6797Kevin-CW Chen7-0/+1134
2017-01-26clk: mediatek: Fix MT8135 dependenciesJean Delvare1-2/+2
2017-01-26clk: mediatek: Fix MT2701 dependenciesJean Delvare1-7/+8
2016-11-08reset: mediatek: Add MT2701 reset driverShunli Wang2-4/+16
2016-11-08clk: mediatek: Add MT2701 clock supportShunli Wang14-5/+1797
2016-10-17clk: mediatek: Add hardware dependencyJean Delvare1-0/+2
2016-09-21clk: mediatek: clk-mt8173: Unmap region obtained by of_iomapArvind Yadav1-1/+3
2016-08-19clk: mediatek: Refine the makefile to support multiple clock driversJames Liao2-3/+24
2016-08-18clk: mediatek: remove __init from clk registration functionsJames Liao3-8/+8
2016-05-06clk: mediatek: remove hdmitx_dig_cts from TOP clocksPhilipp Zabel1-1/+0
2016-05-06clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock outputPhilipp Zabel1-0/+5
2016-05-06clk: mediatek: make dpi0_sel propagate rate changesPhilipp Zabel2-3/+18
2016-03-29clk: mediatek: Make reset_control_ops constPhilipp Zabel1-1/+1
2016-03-02clk: mediatek: Remove CLK_IS_ROOTStephen Boyd1-2/+2
2016-01-29clk: mediatek: Fix memory leak on clock init failJames Liao1-2/+4
2016-01-29clk: move the common clock's to_clk_*(_hw) macros to clk-provider.hGeliang Tang2-5/+5
2015-10-01clk: mediatek: Add USB clock support in MT8173 APMIXEDSYSJames Liao5-7/+159
2015-10-01clk: mediatek: Add subsystem clocks of MT8173James Liao1-0/+267
2015-10-01clk: mediatek: Fix rate and dependency of MT8173 clocksJames Liao1-6/+13
2015-10-01clk: mediatek: Add fixed clocks support for Mediatek SoC.James Liao2-0/+40
2015-10-01clk: mediatek: Add __initdata and __init for data and functionsJames Liao3-10/+11
2015-10-01clk: mediatek: Remove unused code from MT8173.James Liao2-4/+2
2015-10-01clk: mediatek: Removed unused dpi_ck clock from MT8173James Liao1-1/+0
2015-10-01clk: mediatek: add 13mhz clock for MT8173Joe.C1-0/+5
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd4-2/+6
2015-07-28clk: mediatek: Add MT8173 MMPLL change rate supportJames Liao3-6/+42
2015-07-28clk: mediatek: Fix calculation of PLL rate settingsJames Liao1-2/+2
2015-07-28clk: mediatek: Fix PLL registers setting flowJames Liao1-9/+12
2015-07-20clk: mediatek: Properly include clk.hStephen Boyd4-2/+6
2015-07-06clk: mediatek: mt8173: Fix enabling of critical clocksSascha Hauer1-5/+21
2015-06-04clk: mediatek: Fix apmixedsys clock registrationJames Liao2-2/+2
2015-05-19clk: mediatek: Initialize clk_init_dataRicky Liang2-2/+2
2015-05-05clk: mediatek: Add basic clocks for Mediatek MT8173.James Liao2-0/+831
2015-05-05clk: mediatek: Add basic clocks for Mediatek MT8135.James Liao2-0/+645
2015-05-05clk: mediatek: Add reset controller supportSascha Hauer3-0/+108

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