aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/hwtracing
AgeCommit message (Expand)AuthorFilesLines
2017-09-22intel_th: pci: Add Lewisburg PCH supportAlexander Shishkin1-0/+5
2017-09-22intel_th: pci: Add Cedar Fork PCH supportAlexander Shishkin1-0/+5
2017-09-22stm class: Fix a use-after-freeAlexander Shishkin1-1/+1
2017-08-28Merge tag 'stm-for-greg-20170825' of git://git.kernel.org/pub/scm/linux/kerne...Greg Kroah-Hartman9-151/+561
2017-08-28coresight: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: etb10: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: etm3x: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: etm4x: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: funnel: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: replicator: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: stm: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: tmc: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: tpiu: constify amba_idArvind Yadav1-1/+1
2017-08-28coresight: STM: Clean up __iomem type usageStephen Boyd1-8/+9
2017-08-28coresight: Add support for Coresight SoC 600 componentsSuzuki K Poulose3-0/+15
2017-08-28coresight tmc: Add support for Coresight SoC 600 TMCSuzuki K Poulose2-0/+20
2017-08-28coresight tmc: Support for save-restore in ETRSuzuki K Poulose2-1/+21
2017-08-28coresight tmc etr: Setup AXI cache encoding for read transfersSuzuki K Poulose2-1/+15
2017-08-28coresight tmc etr: Cleanup AXICTL register handlingSuzuki K Poulose2-8/+19
2017-08-28coresight tmc etr: Detect address width at runtimeSuzuki K Poulose2-3/+27
2017-08-28coresight tmc: Detect support for scatter gatherSuzuki K Poulose2-0/+7
2017-08-28coresight tmc etr: Add capabilitiy informationSuzuki K Poulose2-5/+35
2017-08-28coresight tmc: Handle configuration types properlySuzuki K Poulose1-3/+11
2017-08-28coresight replicator: Expose replicator management registersSuzuki K Poulose1-0/+23
2017-08-28coresight tmc: Expose DBA and AXICTLSuzuki K Poulose1-0/+4
2017-08-28coresight tmc: Add helpers for accessing 64bit registersSuzuki K Poulose4-8/+34
2017-08-28coresight: Use the new helper for defining registersSuzuki K Poulose5-65/+67
2017-08-28coresight: Add support for reading 64bit registersSuzuki K Poulose1-5/+24
2017-08-28coresight replicator: Cleanup programmable replicator namingSuzuki K Poulose3-9/+7
2017-08-28coresight: etm4x: Adds trace return stack option programming for ETMv4.Mike Leach1-0/+4
2017-08-28coresight: ptm: Adds trace return stack option programming for PTM.Mike Leach2-3/+16
2017-08-28coresight: pmu: Adds return stack option to perf coresight pmuMike Leach1-0/+2
2017-08-28hwtracing: coresight: constify attribute_group structures.Arvind Yadav1-1/+1
2017-08-28coresight: etm3x: Set synchronisation frequencty to TRM defaultMathieu Poirier1-0/+2
2017-08-28coresight: etb10: Move etb_disable_hw() outside of lockMathieu Poirier1-1/+1
2017-08-28coresight: Add barrier packet for synchronisationMathieu Poirier5-3/+67
2017-08-28coresight: etb10: Remove useless conversion to LEMathieu Poirier1-8/+4
2017-08-28coresight: Correct buffer lost incrementMathieu Poirier2-5/+13
2017-08-25intel_th: Perform time resync on capture startAlexander Shishkin5-9/+82
2017-08-25intel_th: Add global activate/deactivate callbacks for the glue layersAlexander Shishkin2-4/+24
2017-08-25intel_th: pci: Use drvdata for quirksAlexander Shishkin3-10/+26
2017-08-25intel_th: pci: Add Cannon Lake PCH-LP supportAlexander Shishkin1-0/+5
2017-08-25intel_th: pci: Add Cannon Lake PCH-H supportAlexander Shishkin1-0/+5
2017-08-25intel_th: pti: Support Low Power Path output port typeAlexander Shishkin2-5/+118
2017-08-25intel_th: Enumerate Low Power Path output port typeAlexander Shishkin2-1/+17
2017-08-25intel_th: msu: Use the real device in case of IOMMU domain allocationAlexander Shishkin1-6/+6
2017-08-25intel_th: Make the switch allocate its subdevicesAlexander Shishkin3-88/+230
2017-08-25intel_th: Make SOURCE devices children of the root deviceAlexander Shishkin2-18/+27
2017-08-25intel_th: Streamline the subdevice tree accessorsAlexander Shishkin2-16/+24
2017-08-25intel_th: Output devices without ports don't need assigningAlexander Shishkin1-11/+12

Privacy Policy