path: root/drivers/spmi
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2015-11-04Merge tag 'char-misc-4.4-rc1' of ↵Linus Torvalds2-10/+6
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big char/misc driver update for 4.4-rc1. Lots of different driver and subsystem updates, hwtracing being the largest with the addition of some new platforms that are now supported. Full details in the shortlog. All of these have been in linux-next for a long time with no reported issues" * tag 'char-misc-4.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (181 commits) fpga: socfpga: Fix check of return value of devm_request_irq lkdtm: fix ACCESS_USERSPACE test mcb: Destroy IDA on module unload mcb: Do not return zero on error path in mcb_pci_probe() mei: bus: set the device name before running fixup mei: bus: use correct lock ordering mei: Fix debugfs filename in error output char: ipmi: ipmi_ssif: Replace timeval with timespec64 fpga: zynq-fpga: Fix issue with drvdata being overwritten. fpga manager: remove unnecessary null pointer checks fpga manager: ensure lifetime with of_fpga_mgr_get fpga: zynq-fpga: Change fw format to handle bin instead of bit. fpga: zynq-fpga: Fix unbalanced clock handling misc: sram: partition base address belongs to __iomem space coresight: etm3x: adding documentation for sysFS's cpu interface vme: 8-bit status/id takes 256 values, not 255 fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000 ARM: zynq: dt: Updated devicetree for Zynq 7000 platform. ARM: dt: fpga: Added binding docs for Xilinx Zynq FPGA manager. ver_linux: proc/modules, limit text processing to 'sed' ...
2015-10-13irqdomain: Use irq_domain_get_of_node() instead of direct field accessMarc Zyngier1-1/+1
The struct irq_domain contains a "struct device_node *" field (of_node) that is almost the only link between the irqdomain and the device tree infrastructure. In order to prepare for the removal of that field, convert all users to use irq_domain_get_of_node() instead. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-and-tested-by: Hanjun Guo <hanjun.guo@linaro.org> Tested-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Tomasz Nowicki <tomasz.nowicki@linaro.org> Cc: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Cc: Graeme Gregory <graeme@xora.org.uk> Cc: Jake Oshins <jakeo@microsoft.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Link: http://lkml.kernel.org/r/1444737105-31573-2-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-10-04spmi: pmic-arb: u8 <= 0xff is always trueStephen Boyd1-1/+1
Silences this static checker warning: drivers/spmi/spmi-pmic-arb.c:363 pmic_arb_write_cmd() warn: always true condition '(opc <= 255) => (0-255 <= 255)' Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-10-04spmi: pmic-arb: Don't byte swap when reading/writing FIFOStephen Boyd1-7/+2
We don't want to swap bytes that we're reading and writing to the FIFOs when we're running on a big-endian CPU. Doing so causes problems like where the qcom-spmi-iadc driver can't detect the type of device because the bytes are all mixed up. Use the raw IO accessors for these API instead, and collapse pmic_arb_base_read() into the byte reading API so that we aren't tempted to read non-FIFO data like commands with that function. Cc: Andy Gross <agross@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-20spmi: Auto-populate driver.owner in spmi_driver_register()Stephen Boyd1-2/+3
Populate the owner field of the spmi driver when spmi_driver_register() is called in a similar fashion to how other *_driver_register() functions do it. This saves driver writers from having to do this themselves. Cc: Andy Gross <agross@codeaurora.org> Cc: Gilad Avidov <gavidov@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner1-1/+1
Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
2015-09-01Merge branch 'irq-core-for-linus' of ↵Linus Torvalds1-8/+5
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq updates from Thomas Gleixner: "This updated pull request does not contain the last few GIC related patches which were reported to cause a regression. There is a fix available, but I let it breed for a couple of days first. The irq departement provides: - new infrastructure to support non PCI based MSI interrupts - a couple of new irq chip drivers - the usual pile of fixlets and updates to irq chip drivers - preparatory changes for removal of the irq argument from interrupt flow handlers - preparatory changes to remove IRQF_VALID" * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits) irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2 irqchip: Add documentation for the bcm2836 interrupt controller irqchip/bcm2835: Add support for being used as a second level controller irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ PCI: xilinx: Fix typo in function name irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance irqchip/gic: Only allow the primary GIC to set the CPU map PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove unicore32/irq: Prepare puv3_gpio_handler for irq argument removal tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal m68k/irq: Prepare irq handlers for irq argument removal C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal blackfin: Prepare irq handlers for irq argument removal arc/irq: Prepare idu_cascade_isr for irq argument removal sparc/irq: Use access helper irq_data_get_affinity_mask() sparc/irq: Use helper irq_data_get_irq_handler_data() parisc/irq: Use access helper irq_data_get_affinity_mask() mn10300/irq: Use access helper irq_data_get_affinity_mask() irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal ...
2015-08-05spmi: Select IRQ_DOMAIN instead of depend on itStephen Boyd1-1/+1
IRQ_DOMAIN is a hidden config option, so depending on it doesn't make any sense. Select the config option because it's required to compile this driver. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-05spmi: pmic-arb: add support for irq_get_irqchip_stateCourtney Cavin1-0/+17
Reviewed-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Courtney Cavin <courtney.cavin@sonymobile.com> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Tested-by: Tim Bird <tim.bird@sonymobile.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-08-05spmi: add command tracepoints for SPMIAnkit Gupta1-3/+19
Add tracepoints to retrieve information about read, write and non-data commands. For performance measurement support tracepoints are added at the beginning and at the end of transfers. Following is a list showing the new tracepoint events. The "cmd" parameter here represents the opcode, SID, and full 16-bit address. spmi_write_begin: cmd and data buffer. spmi_write_end : cmd and return value. spmi_read_begin : cmd. spmi_read_end : cmd, return value and data buffer. spmi_cmd : cmd. The reason that cmd appears at both the beginning and at the end event is that SPMI drivers can request commands concurrently. cmd helps in matching the corresponding events. SPMI tracepoints can be enabled like: echo 1 >/sys/kernel/debug/tracing/events/spmi/enable and will dump messages that can be viewed in /sys/kernel/debug/tracing/trace that look like: ... spmi_read_begin: opc=56 sid=00 addr=0x0000 ... spmi_read_end: opc=56 sid=00 addr=0x0000 ret=0 len=02 buf=0x[01-40] ... spmi_write_begin: opc=48 sid=00 addr=0x0000 len=3 buf=0x[ff-ff-ff] Suggested-by: Sagar Dharia <sdharia@codeaurora.org> Acked-by: Steven Rostedt <rostedt@goodmis.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Gilad Avidov <gavidov@codeaurora.org> Signed-off-by: Ankit Gupta <ankgupta@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-07-29spmi/pmic: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descJiang Liu1-2/+2
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we already have a pointer to corresponding irq_desc. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: http://lkml.kernel.org/r/20150713151750.915477120@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-07-29spmi/pmic_arb: Consolidate chained IRQ handler install/removeThomas Gleixner1-6/+3
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Search and conversion was done with coccinelle. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Link: http://lkml.kernel.org/r/20150713151750.831790045@linutronix.de Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-05-24spmi: Add dependency on HAS_IOMEMRichard Weinberger1-0/+1
Not all architectures have io memory. Fixes: drivers/built-in.o: In function `spmi_pmic_arb_probe': spmi-pmic-arb.c:(.text+0x1ed399): undefined reference to `devm_ioremap_resource' Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-04-03spmi: pmic_arb: remove ARM build time dependencyIvan T. Ivanov1-1/+0
Qualcomm PMIC arbiter driver already depends on ARCH_QCOM, which could be either ARM or ARM64. New version of the PMIC arbiter controller is available on 64 bit platforms. Remove ARM dependency to allow driver to be build for 64 bit platforms. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-26spmi: pmic_arb: add support for hw version 2Gilad Avidov1-59/+260
Qualcomm PMIC Arbiter version-2 changes from version-1 are: - Some different register offsets. - New channel register space, one per PMIC peripheral (ppid). All tx traffic uses these channels. - New observer register space. All rx trafic uses this space. - Different command format for spmi command registers. Reviewed-by: Sagar Dharia <sdharia@codeaurora.org> Signed-off-by: Gilad Avidov <gavidov@codeaurora.org> Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2015-03-26spmi: remove wakeup command before slave probeGilad Avidov1-7/+2
According to spmi spec a slave powers up into startup state and then transitions into active state. Thus, the wakeup command is not required before calling the slave's probe. The wakeup command is only needed for slaves that are in sleep state after receiving the sleep command. Cc: galak@codeaurora.org Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Sagar Dharia <sdharia@codeaurora.org> Acked-by: Josh Cartwright <joshc@eso.teric.us> Signed-off-by: Gilad Avidov <gavidov@codeaurora.org> Tested-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-10-20spmi: drop owner assignment from platform_driversWolfram Sang1-1/+0
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-07-10spmi: Remove duplicate inclusion of module.hSachin Kamat1-1/+0
module.h was included twice. Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-03-08spmi: pm: drop bus-level PM suspend/resume routinesJosh Cartwright1-35/+0
SPMI defines the behavior of a device in the "SLEEP" state as being "user-defined or specified by the device manufacturer". Without clearly-defined bus-level semantics for low-power states, push the responsibility of transitioning a device into/out of "SLEEP" into SPMI device drivers. Cc: Felipe Balbi <balbi@ti.com> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-03-08spmi: pmic_arb: make selectable on ARCH_QCOMJosh Cartwright1-2/+2
With the split of Qualcomm MSM support into legacy and multiplatform, the SPMI PMIC arb driver is only relevant on the multiplatform supported SoCs. Switch the Kconfig depends to ARCH_QCOM. Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-15spmi: pmic_arb: add support for interrupt handlingJosh Cartwright2-2/+376
The Qualcomm PMIC Arbiter, in addition to being a basic SPMI controller, also implements interrupt handling for slave devices. Note, this is outside the scope of SPMI, as SPMI leaves interrupt handling completely unspecified. Extend the driver to provide a irq_chip implementation and chained irq handling which allows for these interrupts to be used. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-15spmi: Add MSM PMIC Arbiter SPMI controllerKenneth Heitke3-0/+424
Qualcomm's PMIC Arbiter SPMI controller functions as a bus master and is used to communication with one or more PMIC (slave) devices on the SPMI bus. The PMIC Arbiter is actually a hardware wrapper around the SPMI controller that provides concurrent and autonomous PMIC access to various entities that need to communicate with the PMIC. The SPMI controller hardware handles all of the SPMI bus activity (bus arbitration, sequence start condition, transmission of frames, etc). This software driver uses the PMIC Arbiter register interface to initiate command sequences on the SPMI bus. The status register is read to determine when the command sequence has completed and whether or not it completed successfully. Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-02-15spmi: Linux driver framework for SPMIKenneth Heitke3-0/+622
System Power Management Interface (SPMI) is a specification developed by the MIPI (Mobile Industry Process Interface) Alliance optimized for the real time control of Power Management ICs (PMIC). SPMI is a two-wire serial interface that supports up to 4 master devices and up to 16 logical slaves. The framework supports message APIs, multiple busses (1 controller per bus) and multiple clients/slave devices per controller. Signed-off-by: Kenneth Heitke <kheitke@codeaurora.org> Signed-off-by: Michael Bohan <mbohan@codeaurora.org> Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

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