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2015-10-02gpio: add DT bindings for existing consumer flagsLinus Walleij1-0/+12
It is customary for GPIO controllers to support open drain/collector and open source/emitter configurations. Add standard GPIO line flags to account for this and augment the documentation to say that these are the most generic bindings. Several people approached me to add new flags to the lines, and this makes sense, but let's first bind up the most common cases before we start to add exotic stuff. Thanks to H. Nikolaus Schaller for ideas on how to encode single-ended wiring such as open drain/source and open collector/emitter. Cc: Tony Lindgren <tony@atomide.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-07pinctrl: Add support for Meson8bCarlo Caione1-0/+32
This patch adds support for the AmLogic Meson8b SoC. Signed-off-by: Carlo Caione <carlo@endlessm.com> Acked-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-01-26pinctrl: add driver for Amlogic Meson SoCsBeniamino Galvani1-0/+157
This is a driver for the pinmux and GPIO controller available in Amlogic Meson SoCs. It currently supports only Meson8, however the common code should be generic enough to work also for other SoCs after having defined the proper set of functions and groups. GPIO interrupts are not supported at the moment due to lack of documentation. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-16ARM: tegra: add port FF to GPIO IDsAshwini Ghuge1-0/+1
NVIDIA Tegra124 supports has the new GPIO port as GPIO_FF. Add the macro for this port name. Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28ARM: tegra: create a DT header defining GPIO IDsStephen Warren1-0/+50
All Tegra GPIOs are named after the GPIO bank and GPIO number within the bank. Define a macro to calculate the GPIO ID based on those parameters. Make the macro available via all Tegra .dtsip files. Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-05ARM: dt: add header to define GPIO flagsStephen Warren1-0/+15
Many GPIO device tree bindings use the same flags. Create a header to define those. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Rob Herring <rob.herring@calxeda.com>

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