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authorConor Dooley <conor.dooley@microchip.com>2022-08-05 08:43:46 +0100
committerWolfram Sang <wsa@kernel.org>2022-08-11 14:28:56 +0200
commitdde61c48303afae6d5db50fc2c9f7199413945e5 (patch)
tree89862558ac56097f4e1d10b9cfa7651e442bea71 /drivers
parent0a0b80a44c7d111a0404d91847db57be8b667a15 (diff)
i2c: microchip-corei2c: fix erroneous late ack send
A late ack is currently being sent at the end of a transfer due to incorrect logic in mchp_corei2c_empty_rx(). Currently the Assert Ack bit is being written to the controller's control reg after the last byte has been received, causing it to sent another byte with the ack. Instead, the AA flag should be written to the control register when the penultimate byte is read so it is sent out for the last byte. Reported-by: Andreas Buerkler <andreas.buerkler@enclustra.com> Fixes: 64a6f1c4987e ("i2c: add support for microchip fpga i2c controllers") Tested-by: Lewis Hanly <lewis.hanly@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> [wsa: fixed typos in commit message] Signed-off-by: Wolfram Sang <wsa@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/busses/i2c-microchip-corei2c.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/i2c/busses/i2c-microchip-corei2c.c b/drivers/i2c/busses/i2c-microchip-corei2c.c
index 6df0f1c33278..4d7e9b25f018 100644
--- a/drivers/i2c/busses/i2c-microchip-corei2c.c
+++ b/drivers/i2c/busses/i2c-microchip-corei2c.c
@@ -206,7 +206,7 @@ static void mchp_corei2c_empty_rx(struct mchp_corei2c_dev *idev)
idev->msg_len--;
}
- if (idev->msg_len == 0) {
+ if (idev->msg_len <= 1) {
ctrl = readb(idev->base + CORE_I2C_CTRL);
ctrl &= ~CTRL_AA;
writeb(ctrl, idev->base + CORE_I2C_CTRL);

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