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authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>2022-02-27 15:20:48 +0000
committerMauro Carvalho Chehab <mchehab@kernel.org>2022-06-27 08:37:32 +0100
commitce380f225d78b86fdb1a85947529d21b2c726d8d (patch)
tree7a4bd4ac28efdedc6c3991e589c61578ebe8f578 /drivers
parent2a6b586035ecb1c1e26a9aec5f8934055e18b0a7 (diff)
media: rkisp1: debug: Move resizer register dump to debugfs
The debugfs support already includes support to dump core and ISP registers. Move the resizer register dump there too to make the userspace interface consistent. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Ricardo Ribalda <ribalda@chromium.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c57
-rw-r--r--drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c37
2 files changed, 57 insertions, 37 deletions
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
index 63aa81553178..d6cfbfaba3cb 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-debug.c
@@ -81,6 +81,57 @@ static int rkisp1_debug_dump_isp_regs_show(struct seq_file *m, void *p)
}
DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_isp_regs);
+#define RKISP1_DEBUG_RSZ_REG_DEC(name) { \
+ RKISP1_CIF_##name, RKISP1_CIF_##name##_SHD, #name, false \
+}
+
+#define RKISP1_DEBUG_RSZ_REG_HEX(name) { \
+ RKISP1_CIF_##name, RKISP1_CIF_##name##_SHD, #name, true \
+}
+
+static int rkisp1_debug_dump_rsz_regs_show(struct seq_file *m, void *p)
+{
+ static const struct {
+ u32 reg;
+ u32 shadow;
+ const char * const name;
+ bool hex;
+ } registers[] = {
+ RKISP1_DEBUG_RSZ_REG_HEX(RSZ_CTRL),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HCB),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_HCR),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_VY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_SCALE_VC),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_HY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_HC),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_VY),
+ RKISP1_DEBUG_RSZ_REG_DEC(RSZ_PHASE_VC),
+ { /* Sentinel */ },
+ };
+
+ struct rkisp1_resizer *rsz = m->private;
+ typeof(registers[0]) *reg;
+ u32 val, shd;
+ int ret;
+
+ ret = pm_runtime_get_if_in_use(rsz->rkisp1->dev);
+ if (ret <= 0)
+ return ret ? : -ENODATA;
+
+ for (reg = registers; reg->name; ++reg) {
+ val = rkisp1_read(rsz->rkisp1, rsz->regs_base + reg->reg);
+ shd = rkisp1_read(rsz->rkisp1, rsz->regs_base + reg->shadow);
+ seq_printf(m, reg->hex ? "%14s: 0x%08x/0x%08x\n" : "%14s: %u/%u\n",
+ reg->name, val, shd);
+ }
+
+ pm_runtime_put(rsz->rkisp1->dev);
+
+ return 0;
+}
+DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_rsz_regs);
+
#define RKISP1_DEBUG_DATA_COUNT_BINS 32
#define RKISP1_DEBUG_DATA_COUNT_STEP (4096 / RKISP1_DEBUG_DATA_COUNT_BINS)
@@ -168,6 +219,12 @@ void rkisp1_debug_init(struct rkisp1_device *rkisp1)
&rkisp1_debug_dump_core_regs_fops);
debugfs_create_file("isp", 0444, regs_dir, rkisp1,
&rkisp1_debug_dump_isp_regs_fops);
+ debugfs_create_file("mrsz", 0444, regs_dir,
+ &rkisp1->resizer_devs[RKISP1_MAINPATH],
+ &rkisp1_debug_dump_rsz_regs_fops);
+ debugfs_create_file("srsz", 0444, regs_dir,
+ &rkisp1->resizer_devs[RKISP1_SELFPATH],
+ &rkisp1_debug_dump_rsz_regs_fops);
}
void rkisp1_debug_cleanup(struct rkisp1_device *rkisp1)
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
index ac1b357a2a3a..1c07985c810d 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-resizer.c
@@ -203,41 +203,6 @@ static void rkisp1_dcrop_config(struct rkisp1_resizer *rsz)
* Resizer hw configs
*/
-static void rkisp1_rsz_dump_regs(struct rkisp1_resizer *rsz)
-{
- dev_dbg(rsz->rkisp1->dev,
- "RSZ_CTRL 0x%08x/0x%08x\n"
- "RSZ_SCALE_HY %d/%d\n"
- "RSZ_SCALE_HCB %d/%d\n"
- "RSZ_SCALE_HCR %d/%d\n"
- "RSZ_SCALE_VY %d/%d\n"
- "RSZ_SCALE_VC %d/%d\n"
- "RSZ_PHASE_HY %d/%d\n"
- "RSZ_PHASE_HC %d/%d\n"
- "RSZ_PHASE_VY %d/%d\n"
- "RSZ_PHASE_VC %d/%d\n",
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_CTRL_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCB_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_HCR_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_SCALE_VC_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_HC_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VY_SHD),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC),
- rkisp1_rsz_read(rsz, RKISP1_CIF_RSZ_PHASE_VC_SHD));
-}
-
static void rkisp1_rsz_update_shadow(struct rkisp1_resizer *rsz,
enum rkisp1_shadow_regs_when when)
{
@@ -386,8 +351,6 @@ static void rkisp1_rsz_config(struct rkisp1_resizer *rsz,
/* set values in the hw */
rkisp1_rsz_config_regs(rsz, &sink_y, &sink_c, &src_y, &src_c, when);
-
- rkisp1_rsz_dump_regs(rsz);
}
/* ----------------------------------------------------------------------------

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