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-rw-r--r--drivers/staging/media/atomisp/pci/isp2400_input_system_local.h11
-rw-r--r--drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c11
2 files changed, 11 insertions, 11 deletions
diff --git a/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h b/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h
index 21f11bdfc85f..2614b89b8e34 100644
--- a/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h
+++ b/drivers/staging/media/atomisp/pci/isp2400_input_system_local.h
@@ -362,17 +362,6 @@ static const hrt_address __maybe_unused MIPI_PORT_OFFSET[N_MIPI_PORT_ID] = {
0x00000200UL
};
-static const mipi_lane_cfg_t MIPI_PORT_LANES[N_RX_MODE][N_MIPI_PORT_ID] = {
- {MIPI_4LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
- {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
- {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
- {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
- {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_2LANE_CFG},
- {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG},
- {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG},
- {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}
-};
-
static const hrt_address __maybe_unused SUB_SYSTEM_OFFSET[N_SUB_SYSTEM_ID] = {
0x00001000UL,
0x00002000UL,
diff --git a/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c b/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
index 60b98c10a3bc..af153c3fb86d 100644
--- a/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
+++ b/drivers/staging/media/atomisp/pci/runtime/isys/src/rx.c
@@ -476,6 +476,17 @@ unsigned int ia_css_csi2_calculate_input_system_alignment(
#endif
#if !defined(ISP2401)
+static const mipi_lane_cfg_t MIPI_PORT_LANES[N_RX_MODE][N_MIPI_PORT_ID] = {
+ {MIPI_4LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
+ {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
+ {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
+ {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_0LANE_CFG},
+ {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_2LANE_CFG},
+ {MIPI_3LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG},
+ {MIPI_2LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG},
+ {MIPI_1LANE_CFG, MIPI_1LANE_CFG, MIPI_1LANE_CFG}
+};
+
void ia_css_isys_rx_configure(const rx_cfg_t *config,
const enum ia_css_input_mode input_mode)
{

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